• Title/Summary/Keyword: Recovery phase

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Partitioning of Recombinant Human Interleukin-2 in a Poly(ethylene glycol)-Dextran Aqueous Two-Phase System

  • Lee, In-Young;Lee, Sun-Bok
    • Journal of Microbiology and Biotechnology
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    • v.2 no.2
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    • pp.135-140
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    • 1992
  • The partitioning of recombinant human interleukin-2(rhII-2) in PEG 8000-dextran 38800 aqueous two-phase system has been investigated using three different sources of rhIL-2. In the case of pure rhIL-2, the solubility in a PEG-dextran two-phase system was low and most of rhIL-2 was partitioned into the bottom phase. For the recovery of rhIL-2 from insoluble protein aggregates, the inclusion bodies of recombinant E. coli were solubilized by the treatment with sodium dodecyl sulfate (SDS). The addition of SDS significantly enhanced not only the solubility of rhIL-2 but also the partitioning of rhIL-2 to the top phase. When the ratio of SDS to rhIL-2 was 2.0, the partition coefficient(K) and the recovery yield(Y) at the top phase were 4.5 and 88%, respectively, at pH 6.8. In order to reduce the recovery steps further, SDS was directly added to the intact recombinant E. coli cells and then partitioned into the PEG/dextran aqueous two-phase system. The observed partition coefficient ($K{\cong{3.0$) and recovery yield ($Y{\geq}80%$ )of this method were comparable to the rhIL-2 recovery from insoluble protein aggregates. The results obtained in this work indicate that PEG-dextran two-phase partitioning might provide a simple way for the recovery and partial purification of recombinant proteins which are produced as inclusion bodies.

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Design of a Carrier Recovery Loop with Minimum Phase Rotation (Phase Rotation 방지를 위한 Carrier Recovery Loop의 설계)

  • Choi, Han-Jun;Lee, Seung-Jun
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.2
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    • pp.62-67
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    • 1999
  • Phase rotational is a practical problem in the implementation of coherent demodulation. Large phase noise may intorduce phase rotation in the demodulator which results in repeated decision errors. This paper presents a simple and yet very efficient technique in building a carrier recovery loop which minimizes the phase rotation by improving the stability of the decision-directed carrier recovery loop. Simulation shows this novel technique improves the performance of the carrier recovery loop as well as stability.

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A Phase Recovery and Amplitude Compensation Scheme for QPSK All Digital Receiver Using CORDIC Algorithm (CORDIC 알고리즘을 이용한 QPSK 디지털 수신기의 위상 복원 및 진폭보상방안)

  • Seo, Kwang-Nam;Kim, Chong-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.12C
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    • pp.1029-1034
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    • 2010
  • For All Digital QPSK receivers, a phase recovery scheme is required to fix the arbitrarily rotated I/Q quadrature signals due to the transmission path and clock mismatch between the transmitter and the receiver. The conventional Costas phase recovery loop scheme requires a separate AGC(Automatic Gain Control) to obtain the performance independent of input signal power. This paper proposes a simple scheme which separates the phase and amplitude of the input signal via CORDIC algorithm and performs the phase recovery and amplitude compensation simultaneously. The proposed scheme can considerably reduce the logic resources in hardware implementation, has been verified by C++ and Model Sim simulations.

Design and Implementation of 40 Gb/s Clock Recovery Module Using a Phase-Locked Loop with hold function (유지 기능을 가지는 위상고정 루프를 이용한 40 Gb/s 클락 복원 모듈 설계 및 구현)

  • Park, Hyun;Woo, Dong-Sik;Kim, Jin-Joog;Lim, Sang-Kyu;Kim, Kang-Wook
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.191-196
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    • 2005
  • A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver has been designed and implemented. It consists of a clock recovery circuit, a RF mixer and frequency discriminator for phase/frequency detection, a DR-VCO, a phase shifter, and a hold circuit. The recovered 40 GHz clock is synchronized with a stable 10 GHz DR-VCO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module has shown to significantly improve the performance of the conventional open-loop type clock recovery module with DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When input signal is dropped, the 40 GHz clock is generated continuously by hold circuit. The implemented clock recovery module can be used as a low-cost and high-performance receiver module for 40 Gb/s commercial optical network.

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Recovery of IGF-I Using Liquid Emulsion Membranes (액막법을 이용한 IGF-I 회수)

  • 최광수;문용일
    • Korean Journal of Animal Reproduction
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    • v.22 no.1
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    • pp.89-94
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    • 1998
  • A study was made to investigate the effects of concerning factors with IGF-I recovery on the final IGF-I concentration in the effluent and to establish recovery conditions of IGF-I using liquid emulsion membranes(LEM). D2EHPA was best carrier among Amberlite LA2, Aliquit 336 and D2EHPA for recovery rate of IGF-I. Recovery rate of IGF-I by D2EHPA volume in the oil phase was increased as increasing D2EHPA volume, and optimal volume of D2EHPA was 5% in this experiment. The recovery rate of IGF-I by D2EHPA was increased by the decreasing from pH 7 to pH 4 of external phase. Therefore, optimal pH value was 4.0. Optimal concentrations of sulfuric acid in internal phase, paraffin oil in oil phase and Span 80 for recovery rate of IGF-I were 0.1M, 2.0% and 5%, respectively, and optimal W/O rate was 2. These results suggested that optimal conditions for recovery of IGF-I were D2EHPA(5%) as carrier, pH 4.0, 0.1M sulfuric acid, 2% paraffin oil, 2.0 W/O rate and 5.0% Span 80.

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Piecewise Phase Recovery Algorithm Using Block Turbo Codes for Next Generation Mobile Communications

  • Ryoo, Sun-Heui;Kim, Soo-Young;Ahn, Do-Seob
    • ETRI Journal
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    • v.28 no.4
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    • pp.435-443
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    • 2006
  • This paper presents an efficient carrier recovery algorithm combined with a turbo-coding technique in a mobile communication system. By using a block turbo code made up of independently decodable block codes, we can efficiently recover the fast time-varying carrier phase as well as correct channel errors. Our simulation results reveal that the proposed scheme can accommodate mobiles with high speed, and at the same time can reduce the number of iterations to lock the phase.

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The Practical Application of Aqueous Two-Phase Processes for the Recovery of Biological Products

  • Rito-Palomares, Marco
    • Journal of Microbiology and Biotechnology
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    • v.12 no.4
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    • pp.535-543
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    • 2002
  • Although the generic implementation of aqueous two-phase systems (ATPS) processes for the recovery of biological products has been exploited for several years, this has not resulted in a wide adoption of the technique. The main reasons involve the poor understanding of the mechanism governing phase formation and the behavior of solute partitioning in ATPS processes, the cost of phase forming polymers, and the necessary extended time to optimize the technique. In this review paper, some of the practical disadvantages attributed to ATPS are addressed. The practical approach exploited to design ATPS processes, the application to achieve process integration, the extended use for the recovery of high-value products, and the recent development of new low-cost ATPS, are discussed. It is proposed that the trend of the practical application of ATPS processes for the recovery of biological products will involve the purification of new high-value bioparticulate products with medical applications. Such a trend will give new impetus to the technique, and will draw attention from industries needing to develop new, and improve existing, commercial processes.

Application of Reversed-Phase Solid Phase Extraction for the HPLC Analysis of Microcystins in Water (다량 시료중 마이크로시스틴의 농축 및 분석)

  • Kim, Myeong-Hee;Kim, Tae-Seung;Kim, Tae-Keun;Park, Sun Ku
    • Analytical Science and Technology
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    • v.13 no.3
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    • pp.399-402
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    • 2000
  • To determine the concentrations of microcystins present in lake water or in tap water using high performance liquid chromatography, it is necessary to concentrate a large volume of water samples (about 20 L) into very small volume (0.1-0.3 mL). Concentration can be conveniently done when disc type solid phase extraction (SPE) apparatus is used. Using this apparatus we have investigated the recovery rates of three kinds of microcystins, RR, YR, LR. The recovery rates were relatively low and the reproducibilities were not good either. It is expected, however, that the appropriate selection of the disc conditioning and eluting solvents and reproducible reconcentration process after SPE will improve both the recovery rates and the reproducibilities.

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A new dual-mode blind equalization algorithm combining carrier phase recovery (반송파 위상 복원을 결합한 새로운 이중모드 블라인드 등화 알고리즘)

  • 오길남;진용옥
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.5
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    • pp.14-23
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    • 1995
  • A new dual-mode algorithm for blind equalization of quadrature amplitude modulation (QAM) signals is proposed. To solve the problem that the constant modulus algorithm (CMA) converges to the constellation with the arbitrary phase rotation, with the modification of the CMA, the proposed algorithm accomplishes blind equalization and carrier phase recovery simultaneously. In addition, the dual-mode algorithm combining the modified constant modulus algorithm (MCMA) with decision-directed (DD) algorithm achieves the performance enhancement of blind convergence speed and steady-state residual ISI. So we can refer the proposed algorithm to as a scheme for joint blind equalization and carrier phase recovery. Simulation results for i.i.d. input signals confirm that the dual-mode algorithm results in faster convergence speed, samller residual ISI, and better carrier phase recovery than those of the CMA and DD algorithm without any significant increase in computational complexity.

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Design of Wide-range All Digital Clock and Data Recovery Circuit (광대역 전디지털 클록 데이터 복원회로 설계)

  • Go, Gwi-Han;Jung, Ki-Sang;Kim, Kang-Jik;Cho, Seong-Ik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.11
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    • pp.1695-1699
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    • 2012
  • This paper is proposed all digital wide-range clock and data recovery circuit. The Proposed clock data recovery circuit is possible input data rate which is suggested is wide-range that extends from 100Mb/s to 3Gb/s and used an phase error detector which can use a way of over-sampling a data by using a 1/2-rate multi-phase clock and phase rotator which is regular size per $2{\pi}$/16 and can make a phase rotation. So it could make the phase rotating in range of input data rate. Also all circuit is designed as a digital which has a specificity against a noise. This circuit is designed to 0.13um CMOS process and verified simulation to spectre tool.