• Journal of Microbiology and Biotechnology
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• 제2권2호
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• pp.135-140
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• 1992

The partitioning of recombinant human interleukin-2(rhII-2) in PEG 8000-dextran 38800 aqueous two-phase system has been investigated using three different sources of rhIL-2. In the case of pure rhIL-2, the solubility in a PEG-dextran two-phase system was low and most of rhIL-2 was partitioned into the bottom phase. For the recovery of rhIL-2 from insoluble protein aggregates, the inclusion bodies of recombinant E. coli were solubilized by the treatment with sodium dodecyl sulfate (SDS). The addition of SDS significantly enhanced not only the solubility of rhIL-2 but also the partitioning of rhIL-2 to the top phase. When the ratio of SDS to rhIL-2 was 2.0, the partition coefficient(K) and the recovery yield(Y) at the top phase were 4.5 and 88%, respectively, at pH 6.8. In order to reduce the recovery steps further, SDS was directly added to the intact recombinant E. coli cells and then partitioned into the PEG/dextran aqueous two-phase system. The observed partition coefficient ($K{\cong{3.0$) and recovery yield ($Y{\geq}80%$ )of this method were comparable to the rhIL-2 recovery from insoluble protein aggregates. The results obtained in this work indicate that PEG-dextran two-phase partitioning might provide a simple way for the recovery and partial purification of recombinant proteins which are produced as inclusion bodies.

• 전자공학회논문지C
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• 제36C권2호
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• pp.62-67
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• 1999

변조된 Passband 신호의 동기 검파 방식의 복조(Coherent Demodulation)에서 대부분의 수신 신호 decision에서 나타나는 실제적인 문제는 그 성상도가 회전하는 경우이다. 일단 성상도가 회전하는 경우이다. 일단 성상도가 회전하게 되면 수신단에서는 유효한 성상도와 구별해 낼 수 있는 방법이 없다. 그러나 수신기는 회전된 성상도에 의해 수신된 위상을 결정하므로 이러한 문제를 극복해 낼 수 없다면 그 결과는 계속되는 에러로 나타나게 된다. 본 논문에서는 먼저 QPSK 복조기에서의 주파수 옵셋과 위상 오차를 극복하기 위한 Carrier Recovery Loop에 대해서 살펴보고 나서 위상 Rotation을 방지하기 위한 방법을 제시하였다. 검출된 위상 오차를 주파수 옵셋 교정에 선별적으로 적용함으로써 Phase rotation의 발생을 줄일 수 있다. 시뮬레이션을 통해 제시한 방법의 타당성을 검증하였다.

• 한국통신학회논문지
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• 제35권12C호
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• pp.1029-1034
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• 2010

QPSK 디지털 수신기는 전송 경로 또는 송수신기 간의 클럭 차이에 의해 발생하는 위상 편차를 보정하기 위해 위상 복원 방안이 필요하다. 널리 사용되고 있는 디지털 Costas 위상 복원 루프는 입력신호의 주파수/위상 복원 성능이 입력 신호의 전력에 따라 달라지므로 별도의 자동 이득조정 (AGC) 루프가 필요하고, 이는 하드웨어 구현시 시스템의 복잡도와 사용 자원을 증가시킨다. 본 논문에서는 입력 전력에 관계없이 일정한 위상 보정 기능을 수행할 수 있으며 타이밍 복원을 위한 AGC를 동시에 제공할 수 있는 위상 보정 및 진폭 보상 방안을 제안하였다. 제안된 방안은 CORDIC 알고리즘을 사용하여 입력 신호의 위상 및 진폭 정보를 분리하여 각각 처리하며 시스템의 복장도 및 사용 자원을 대폭 절감할 수 있으며, C++ 및 Model Sim을 사용한 모의실험을 통해 본 논문에서 제안한 위상 복원 루프의 동작을 검증하였다.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2005년도 종합학술발표회 논문집 Vol.15 No.1
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• pp.191-196
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• 2005

A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver has been designed and implemented. It consists of a clock recovery circuit, a RF mixer and frequency discriminator for phase/frequency detection, a DR-VCO, a phase shifter, and a hold circuit. The recovered 40 GHz clock is synchronized with a stable 10 GHz DR-VCO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module has shown to significantly improve the performance of the conventional open-loop type clock recovery module with DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When input signal is dropped, the 40 GHz clock is generated continuously by hold circuit. The implemented clock recovery module can be used as a low-cost and high-performance receiver module for 40 Gb/s commercial optical network.

• 한국가축번식학회지
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• 제22권1호
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• pp.89-94
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• 1998

A study was made to investigate the effects of concerning factors with IGF-I recovery on the final IGF-I concentration in the effluent and to establish recovery conditions of IGF-I using liquid emulsion membranes(LEM). D2EHPA was best carrier among Amberlite LA2, Aliquit 336 and D2EHPA for recovery rate of IGF-I. Recovery rate of IGF-I by D2EHPA volume in the oil phase was increased as increasing D2EHPA volume, and optimal volume of D2EHPA was 5% in this experiment. The recovery rate of IGF-I by D2EHPA was increased by the decreasing from pH 7 to pH 4 of external phase. Therefore, optimal pH value was 4.0. Optimal concentrations of sulfuric acid in internal phase, paraffin oil in oil phase and Span 80 for recovery rate of IGF-I were 0.1M, 2.0% and 5%, respectively, and optimal W/O rate was 2. These results suggested that optimal conditions for recovery of IGF-I were D2EHPA(5%) as carrier, pH 4.0, 0.1M sulfuric acid, 2% paraffin oil, 2.0 W/O rate and 5.0% Span 80.

• ETRI Journal
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• 제28권4호
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• pp.435-443
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• 2006

This paper presents an efficient carrier recovery algorithm combined with a turbo-coding technique in a mobile communication system. By using a block turbo code made up of independently decodable block codes, we can efficiently recover the fast time-varying carrier phase as well as correct channel errors. Our simulation results reveal that the proposed scheme can accommodate mobiles with high speed, and at the same time can reduce the number of iterations to lock the phase.

• Journal of Microbiology and Biotechnology
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• 제12권4호
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• pp.535-543
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• 2002

Although the generic implementation of aqueous two-phase systems (ATPS) processes for the recovery of biological products has been exploited for several years, this has not resulted in a wide adoption of the technique. The main reasons involve the poor understanding of the mechanism governing phase formation and the behavior of solute partitioning in ATPS processes, the cost of phase forming polymers, and the necessary extended time to optimize the technique. In this review paper, some of the practical disadvantages attributed to ATPS are addressed. The practical approach exploited to design ATPS processes, the application to achieve process integration, the extended use for the recovery of high-value products, and the recent development of new low-cost ATPS, are discussed. It is proposed that the trend of the practical application of ATPS processes for the recovery of biological products will involve the purification of new high-value bioparticulate products with medical applications. Such a trend will give new impetus to the technique, and will draw attention from industries needing to develop new, and improve existing, commercial processes.

• 분석과학
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• 제13권3호
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• pp.399-402
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• 2000

To determine the concentrations of microcystins present in lake water or in tap water using high performance liquid chromatography, it is necessary to concentrate a large volume of water samples (about 20 L) into very small volume (0.1-0.3 mL). Concentration can be conveniently done when disc type solid phase extraction (SPE) apparatus is used. Using this apparatus we have investigated the recovery rates of three kinds of microcystins, RR, YR, LR. The recovery rates were relatively low and the reproducibilities were not good either. It is expected, however, that the appropriate selection of the disc conditioning and eluting solvents and reproducible reconcentration process after SPE will improve both the recovery rates and the reproducibilities.

• 전자공학회논문지A
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• 제32A권5호
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• pp.14-23
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• 1995

A new dual-mode algorithm for blind equalization of quadrature amplitude modulation (QAM) signals is proposed. To solve the problem that the constant modulus algorithm (CMA) converges to the constellation with the arbitrary phase rotation, with the modification of the CMA, the proposed algorithm accomplishes blind equalization and carrier phase recovery simultaneously. In addition, the dual-mode algorithm combining the modified constant modulus algorithm (MCMA) with decision-directed (DD) algorithm achieves the performance enhancement of blind convergence speed and steady-state residual ISI. So we can refer the proposed algorithm to as a scheme for joint blind equalization and carrier phase recovery. Simulation results for i.i.d. input signals confirm that the dual-mode algorithm results in faster convergence speed, samller residual ISI, and better carrier phase recovery than those of the CMA and DD algorithm without any significant increase in computational complexity.

• 전기학회논문지
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• 제61권11호
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• pp.1695-1699
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• 2012

This paper is proposed all digital wide-range clock and data recovery circuit. The Proposed clock data recovery circuit is possible input data rate which is suggested is wide-range that extends from 100Mb/s to 3Gb/s and used an phase error detector which can use a way of over-sampling a data by using a 1/2-rate multi-phase clock and phase rotator which is regular size per $2{\pi}$/16 and can make a phase rotation. So it could make the phase rotating in range of input data rate. Also all circuit is designed as a digital which has a specificity against a noise. This circuit is designed to 0.13um CMOS process and verified simulation to spectre tool.