• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.32 no.10
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• pp.67-76
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• 2004

This paper improves existing 'fly-the-wire' based autonomous station-keeping system, suitable for geostationary satellite and introduces results of computer simulations conducted to verify the algorithm. The on-board stationkeeping system receives pseudo-range signals from two ground equipments located with long baseline, determines the orbit error in realtime and generates orbit control commands. To reduce fuel consumption, this paper proposes an on-board orbit control logic using modified fly-the-wire method. The modified fly-the-wire method de-couples error components into two dynamic modes, harmonic and linear motion. The harmonic error components are removed by applying output commands produced by feedback controller, and the linear motions are controlled by the correction ${\Delta}V\;s$ added to reference maneuvers. The reference maneuvers are generated through the ground based computer simulation and embedded or uploaded into the on-board computer with time tags. Finally, the performance of the proposed algorithm is verified through a series of computer simulations.

• Journal of Broadcast Engineering
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• v.12 no.1 s.34
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• pp.53-60
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• 2007

A Digital Broadcasting Satellite (DBS) receiver converts digital A/V streams received from a satellite to analog NTSC A/V signals in real-time. Multi-tasking is an efficient way to improve the utilization of the processor core in real-time applications. In this paper, we propose a hybrid approach with a balanced trade-off between hardware kernel and multi-tasking programming to increase a system throughput. First, the schedulability of the critical hard real-time tasks in the DBS receiver is verified by using a simple feasibility test. Then, several soft real-time tasks are thoughtfully programmed to satisfy functional requirements of the system.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.485-486
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• 2007

Wireless Sensor Networking is state of the art technology that has a wide range of potential applications. Sensor network generally consists of a large number of distributed nodes that organize themselves into a multi-hop wireless network. Each node has one or more sensors, embedded processors and low-power radios, and is normally battery operated because of small size. In this paper wireless sensor networking technology applies to the environment monitoring system in the underground. This system can monitor a pollution level of the underground in realtime for keeping up a comfortable environment.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.882-884
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• 2008

통상 하드웨어 캐시의 크기보다 수십에서 수백배 큰 크기의 데이타를 랜덤하게 접근하는 경우 낮은 메모리 접근 지역성(locality)에 기인하여 캐시 메모리 성능이 급격히 저하되는 문제를 야기한다. 예를 들면, 현재 보편적으로 사용되고 있는 차량용 General Positioning System (GPS) 프로그램의 경우 최대 32개의 위성으로부터 데이터를 받아 수신단의 위치를 계산하는 부분이 핵심 모듈중의 하나 이며, 이는 전체 성능의 50% 이상을 차지한다. 이러한 모듈에서는 위성 신호를 실시간으로 받아 버퍼 메모리에 저장하며, 이때 필요한 데이터가 순차적으로 저장되지 못하기 때문에 랜덤하게 데이터를 읽어 사용하게 된다. 결과적으로 낮은 지역성에 기인하여 실시간 (realtime)안에 데이터 처리를 하기 어려운 문제에 직면하게 된다. 통상의 통신 응용의 알고리즘 상에 내재된(inherited) 낮은 메모리 접근 지역성을 개선하는 것은 알고리즘 상에서의 접근을 요구한다. 이는 높은 비용이 필요함으로 본 연구에서는 사용되는 데이터 구조를 변환하여 지역성을 높이는 방향으로 접근하였다. 결과적으로 핵심 모듈에서 2배, 전체 시스템 성능에서 14%를 개선할 수 있었다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.5
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• pp.1097-1103
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• 2015

In order to build network infrastructure to implement the aforementioned advantages enabling smart device users to work anywhere, professional support and expensive VPN devices are required. This is a barrier to supplying VPN devices to small and medium-sized institutes. To address this issue, this study aims to implement OpenVPN, OpenSSH and iproute based on the OpenWRT platform which is an embedded OS for open networks in affordable open wired/wireless gateway H/W platforms to support the inter-network VPN. In addition, the network environment can be maintained optimal by applying a "multi-queuing real-time traffic shaping technology" to VPN tunnels, although channel quality changes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.43-54
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• 2007

This paper presents design and verification of a face detection hardware for real time application. Face detection algorithm detects rough face position based on already acquired feature parameter data. The hardware is composed of five main modules: Integral Image Calculator, Feature Coordinate Calculator, Feature Difference Calculator, Cascade Calculator, and Window Detection. It also includes on-chip Integral Image memory and Feature Parameter memory. The face detection hardware was verified by using S3C2440A CPU of Samsung Electronics, Virtex4LX100 FPGA of Xilinx, and a CCD Camera module. Our design uses 3,251 LUTs of Xilinx FPGA and takes about 1.96${\sim}$0.13 sec for face detection depending on sliding-window step size, when synthesized for Virtex4LX100 FPGA. When synthesized on Magnachip 0.25um ASIC library, it uses about 410,000 gates (Combinational area about 345,000 gates, Noncombinational area about 65,000 gates) and takes less than 0.5 sec for face realtime detection. This size and performance shows that it is adequate to use for embedded system applications. It has been fabricated as a real chip as a part of XF1201 chip and proven to work.