• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.892-895
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• 2003

This paper describes on RIE(Reactive Ion Etching) characteristics of 3C-SiC(Silicon Carbide) grown on Si(100) wafers. During RIE of 3C-SiC films in this work, $CHF_3$ gas is used to form of polymer as a side wall for excellent anisotropy etching. From this process, etch rates are obtained a $60{\sim}980{\AA}/min$ by various conditions such as $CHF_3$ gas flux, $O_2$ addition ratio, RF power and electrode distance. Also, approximately $40^{\circ}$ mesa structures are successfully formed at 100 mTorr $CHF_3$ gas flow ratio, 200 W RF power and 30 mm electrode distance. Moreover, vertical side wall is fabricated by anisotropy etching with 50% $O_2$ addition ratio and 25 mm electrode distance. Therefore, RIE of 3C-SiC films using $CHF_3$ could be applicable as fabrication process technology for high-temperature 3C-SiC MEMS applications.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.25-28
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• 2001

In this paper, we have investigated the effects of gas flow rate, rf power, process pressure and Ar addition on reactive ion etching of InP, InGaAs and InAlAs using Sic14 and Cl$_2$ gases. The etch rates were measured by using a surface profiler. The etched profiles, sidewall roughness, and surface morphology were observed by scanning electron microscopy and by atomic force microscopy. The selective etching of InGaAs to InP and InAlAs was studied by varying the etching parameters. It was found that Cl$_2$ gas is more efficient for the selective etching of InGaAs to InAlAs than SiCl$_4$ gas. The etch selectivity of InGaAs to InAlAs is strongly dependent on the rf power and the process pressure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.2
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• pp.101-105
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• 1998

This paper describes anisotropic etching technology of highly doped polysilicon. The main etching gases are $Cl_2$ and $SiCl_4$ for reactive ion etching of polysilicon. The mixed $CHCl_3$ to main etching gas makes polymer on etching side wall, so it prevents side etching of polysilicon. The etch rate of polysilicon is increased with increasing RF power. But the etching rate is decreased as the flow rate of $CHCl_3$ is increased with fixed RF power. The etch selectivity of polysilicon and $SiO_2$ is about 12:1. And that of polysilicon and $Si_3N_4$ is about 19:1. In the main etching gas condition, the slope of polysilicon is same as that of photoresist. But in the mixed $CHCl_3$ condition, the slope of polysilicon is larger than that of photoresist. This represents that the polymer made on side wall by added $CHCl_3$ prevents side etching, so anisotropic etching can be possible by polymer.

• Proceedings of the Korean Vacuum Society Conference
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• 1996.06a
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• pp.102-103
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• 1996

• Proceedings of the Korean Magnestics Society Conference
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• 1997.11a
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• pp.82-83
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• 1997

• Journal of the Korean Vacuum Society
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• v.6 no.3
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• pp.242-248
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• 1997

Porous silicons were prepared by dry etching as well as by chemical etching. The latter is a conventional method used by many researchers. Meanwhile, the former is a new method we developed. Also the porous silicon structure was made by E-beam lithography technique. However, due to the limit of this technique, minimum size we could produce was about 0.3 $\mu\textrm{m}$ in diameter on silicon wafer. In a new method, the porous silicon microstructure was fabricated by using Reactive Ion Etching method after covering with diamond powder on 4 inch wafer by using spin coater. In this method, diamond powder acted as a mask. The morphology of samples prepared under many different conditions were analysed be SEM and AFM. And we measured PL spectra for the samples. Based on these results, we observed the structure of a few hundreds $\AA$ in size from porous silicon which was made by dry etching with diamond powder. Also the PL peak for these samples lied around 590 nm compared to 760 nm for chemically etched porous silicon.

• Transactions on Electrical and Electronic Materials
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• v.6 no.6
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• pp.262-271
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• 2005

In order to achieve timely and accurate fault detection of plasma etching process, neural network based time series modeling has been applied to reactive ion etching (RIE) using two different in-situ plasma-monitoring sensors called optical emission spectroscopy (OES) and residual gas analyzer (RGA). Four different subsystems of RIE (such as RF power, chamber pressure, and two gas flows) were considered as potential sources of fault, and multiple degrees of faults were tested. OES and RGA data were simultaneously collected while the etching of benzocyclobutene (BCB) in a $SF_6/O_2$ plasma was taking place. To simulate established TSNNs as incipient fault detectors, each TSNN was trained to learn the parameters at t, t+T, ... , and t+4T. This prediction scheme could effectively compensate run-time-delay (RTD) caused by data preprocessing and computation. Satisfying results are presented in this paper, and it turned out that OES is more sensitive to RF power and RGA is to chamber pressure and gas flows. Therefore, the combination of these two sensors is recommended for better fault detection, and they show a potential to the applications of not only incipient fault detection but also incipient real-time diagnosis.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2515-2517
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• 1998

The micro fresnel lens(MFL) was modeled and fabricated on a XY-stage electrostatically driven by comb actuator. The modeled MFL was approximated as a step shape with 4-phase and 4-zone plate. The focal length and diameter of the MFL is 20mm and 912${\mu}m$, respectively. The XY-stage suspending the MFL is designed to generate a large static displacement up to about 20${\mu}m$. On SOI substrates, we first fabricated MFL using the RIE(reactive Ion etching) technology and then patterned and etched bulk silicon to make XY-stage. After the fabrication of all structures on top side of the SOI substrates. $Si_3N_4$ was deposited for passivation of all structures using PECVD(plasma enhanced chemical vapor deposition). All the MFL systems width comb drive actuator were released by KOH etching from the bottom side of the SOI wafer using double-sided alignment technique. In fabrication of MFL, a dry etching conditions is established in order to improve surface roughness and to control the etched depth.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.473-474
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• 2008

This paper proposes that the relative transmittance and emission intensity measured via optical emission spectroscopy (OES) is a useful for fault detection of reactive ion etch process. With the increased requests for non-invasive as well as real-time plasma process monitoring for fault detection and classification (FDC), OES is suggested as a useful diagnostic tool that satisfies both of the requirements. Relative optical transmittance and emission intensity of oxygen plasma acquired from various process conditions are directly compared with the process variables, such as RF power, oxygen flow and chamber pressure. The changes of RF power and Pressure are linearly proportional to the emission intensity while the change of gas flow can be detected with the relative transmittance.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.11-16
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• 2002

In this study, the dry etching characteristics of $SrBi_2Ta_2O_9$ (SBT) thin films were investigated by using ICP-RIE (inductively coupled plasma-reactive ion etching). The etching damage and degradation were analyzed with XPS (X-ray photoelectron spectroscopy) and C-V (Capacitance-Voltage) measurement. The etching rate increased with increasing the ICP power and the capacitively coupled plasma (CCP) power. The etch rate of 900$\AA$/min was obtained with 700 W of ICP power and 200 W of CCP power. The main problem of dry etching is the degradation of the ferroelectric material. The damage-free etching characteristics were obtained with the $Ar/C1_2/CHF_3$ gas mixture of 20/14/2 when the ICP power and CCP power were biased at 700 W and 200 W, respectively. The experimental results show that the dry etching process with ICP-RIE is applicable to the fabrication of the single transistor type ferroelectric memory device.