• 전자공학회논문지A
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• 제29A권2호
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• pp.68-76
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• 1992

Concurrent Junction process (simultaneous formation of a silicide and a junction on the implanted substrate) by Rapid Thermal Annealig has been investigated. Electrical and material properties of CoSi$_2$ films were analyzed with Alpha Step, 4-point probe, X-ray diffraction(XRD) and Scanning Electron Microscope(SEM). And CoSi$_2$ junctions were examined with Spreading Resistance probe in order to see the redistribution of electrically activated dopants and determined the junction depth. Two step annealing process, which was 80$0^{\circ}C$ for 30sec and 100$0^{\circ}C$ for 30sec in NS12T ambient was employed to form CoSi$_2$ and shallow junctions. Resistivity of CoSi$_2$ was turned out to be 11-15${\mu}$cm and shallow junctions less than 0.1$\mu$m were successfully formed by the process. It was found that the dopant concentration at CoSi$_2$/Si interface increased as decreasing the thickness of Co films in case of $p^{+}/n$ and $n^{+}/p$ junctions while the junction depth decreased as increasing CoSiS12T thickness in case of $p^{+}/n$ junction.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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• pp.6-8
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• 2005

The optical and electrical properties of indium tin oxide (ITO) thin films deposited at room temperature can be substantially enhanced by adopting a two-step process. In the first step, the films (50 nm thick) were grown by pulsed laser deposition (PLD) on glass substrate at room temperature and quickly annealed at $400^{\circ}C$ in nitrogen ambient for 1 minute by using rapid thermal annealing method. The process was completed by additional deposition (150 nm thick) on annealed film at room temperature. High quality ITO films grown by two-step process at room temperature could be obtained with the resistivity of $3.02{\times}10^{-4}{\Omega}cm$, the carrier mobility of 32.07 $cm^2/Vs$, and the transparency above 90 % in visible region mainly due to the enhancement of the film crystallinity and the increase of grain size.

• 한국전기전자재료학회논문지
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• 제20권3호
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• pp.234-239
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• 2007

This paper describes the TiW ohmic contact characteristics under the surface treatment of the polycrystalline 3C-SiC thin film grown on $SiO_2/Si(100)$ wafers by APCVD. The poly 3C-SiC surface was polished by using CMP(chemical mechanical polishing) process and then oxidized by wet-oxidation process, and finally removed SiC oxide layers. A TiW thin film as a metalization process was deposited on the surface treated poly 3C-SiC layer and was annealed through a RTA(rapid thermal annealing) process. TiW/poly 3C-SiC was investigated to get mechanical, physical, and electrical characteristics using SEM, XRD, XPS, AFM, optical microscope, I-V characteristic, and four-point probe, respectively. Contact resistivity of the surface treated 3C-SiC was measured as the lowest $1.2{\times}10^{-5}{\Omega}cm^2$ at $900^{\circ}C$ for 45 sec. Therefore, the surface treatments of poly 3C-SiC are necessary to get better contact resistance for extreme environment MEMS applications.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권4호
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• pp.266-272
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• 2009

In the present work three dimensional process and device simulations were employed to study the performance variations with RTA. It is observed that with the increase in RTA temperature, the arsenic dopants from the source /drain region diffuse laterally under the spacer region and simultaneously acceptors (Boron) are redistributed from the central axis region of the fin towards the Si/SiO2 interface. As a consequence both drive current and peak cut-off frequency of an n-FinFET are observed to improve with RTA temperatures. Volume inversion and hence the flow of carries through the central axis region of the fin due to reduced scattering was found behind the performance improvements with increasing RTA temperature.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.409-412
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• 1998

In this paper, we present an $H^2$ controller design of RTP(rapid thermal processing) systems satisfying robust stability and performance using weighted mixed sensitivity minimization. In industrial fields, RTP system is widely used for improving the oxidation and the annealing in semiconductor manufacturing process. The main control factors are temperature control of wafer and uniformity has been solved by PID control method. Because the reference inputs of RTP are ramp, we improve performance of RTP system by the design of $H^2controller$ using the weighted mixed sensitivity function. Also we compare $H^2controller$ with PID controller in terms of performance. An example is proposed to show the validity of proposed method.

• 한국세라믹학회지
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• 제30권10호
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• pp.803-810
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• 1993

PbxZr0.4Ti0.6O3 thin films were prepared by reactive co-sputtering and annealed by RTA(Rapid Thermal Annealing) process. Effect of Pb content in PbxZr0.4Ti0.6O3 films on the phase transformation was intensively studied. It has been found out that depending on the Pb content as well as RTA temperature, crystal structure of PbxZr0.4Ti0.6O3 films change greatly. It turned out that transformation temperature for perovskite can be lowered and the width of transition temperature region was reduced by increasing Pb content in the film. And the lattice was expanded with increasing Pb content. With increasing RTA temperature, as-deposited phase was transformed into perovskite through three different transformation paths depending on Pb content. It was confirmed that activation energies for nucleation of perovskite structure are much larger than those of its growth.

• 전기학회논문지P
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• 제51권2호
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• pp.77-81
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• 2002

In this study, PZT thin films were fabricated using sol-gel processing onto Si/$SiO_2$/Ti/Pt substrates. PZT sol with different Zr/Ti ratio(20/80, 30/70, 40/60, 52/48) were prepared, respectively. The films were fabricated by using the spin-coating method on substrates. The films were heat treated at $450^{\circ}C$, $650^{\circ}C$ by rapid thermal annealing(RTA). The preferred orientation of the PZT thin films were observed by X-ray diffraction(XRD), and Scanning electron microscopy(SEM). All of the resulting PZT thin films were crystallized with perovskite phase. The fine crystallinity of the films were fabricated. Also, we found that the ferroelectric properties from the dielectric constant of the PZT thin films were over 600 degrees, P-E hysteresis constant. And the leakage current densities of films were lower than $10^{-8}A/cm^2$. It is concluded that the PZT thin films by sol-gel process to be convinced of application for ferroelectric memory device.

• 전자공학회논문지A
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• 제31A권9호
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• pp.114-120
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• 1994

We have been successfully fabricated the low nois HEMT device with AlGaAs and GaAs structure. The epitazial layer with n-type AlgaAs and undoped GaAs was grown by molecular beam epitaxy(MBE) system. Ohmic resistivity of the ource and drain contact is below 5${\times}10^{6}{\Omega}{\cdot}cm^{2}$ by the rapid thermal annealing (RTA) process. The ideality factor of the Schottky gate is below 1.6 and the gate material was Ti/Pt/Au. The HEMTs with 0.25$\mu$m-long and 200$\mu$m-wide gates have exhibited a noise figure of 0.65dB with associated gain of 9dB at 12GHz, and a transconductance of 208mS/mm.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.219-220
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• 2000

We propose a new method for the formation of an aluminum parting layer in the fabrication of field emitter arrays, in which we used a reflow property of aluminum at a lower temperature than the deformation point of glass. After the sputtered aluminum layer on the gate metal was etched for the formation of gate holes, we carried out a rapid thermal annealing process, by which the aluminum slightly diffused into the gate hole. This reflowed aluminum could be used as a parting layer and emitter arrays were easily fabricated using this method.

• 한국재료학회지
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• 제23권7호
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• pp.379-384
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• 2013

In order to produce size-controllable Ag nanoparticles and a nanomesh-patterned Si substrate, we introduce a rapid thermal annealing(RTA) method and a metal assisted chemical etching(MCE) process. Ag nanoparticles were self-organized from a thin Ag film on a Si substrate through the RTA process. The mean diameter of the nanoparticles was modulated by changing the thickness of the Ag film. Furthermore, we controlled the surface energy of the Si substrate by changing the Ar or $H_2$ ambient gas during the RTA process, and the modified surface energy was evaluated through water contact angle test. A smaller mean diameter of Ag nanoparticles was obtained under $H_2$ gas at RTA, compared to that under Ar, from the same thickness of Ag thin film. This result was observed by SEM and summarized by statistical analysis. The mechanism of this result was determined by the surface energy change caused by the chemical reaction between the Si substrate and $H_2$. The change of the surface energy affected on uniformity in the MCE process using Ag nanoparticles as catalyst. The nanoparticles formed under ambient Ar, having high surface energy, randomly moved in the lateral direction on the substrate even though the etching solution consisting of 10 % HF and 0.12 % $H_2O_2$ was cooled down to $-20^{\circ}C$ to minimize thermal energy, which could act as the driving force of movement. On the other hand, the nanoparticles thermally treated under ambient $H_2$ had low surface energy as the surface of the Si substrate reacted with $H_2$. That's why the Ag nanoparticles could keep their pattern and vertically etch the Si substrate during MCE.