• Title/Summary/Keyword: Rapid Thermal Processing

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Implementation of process and surface inspection system for semiconductor wafer stress measurement (반도체 웨이퍼의 스트레스 측정을 위한 공정 및 표면 검사시스템 구현)

  • Cho, Tae-Ik;Oh, Do-Chang
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.8
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    • pp.11-16
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    • 2008
  • In this paper, firstly we made of the rapid thermal processor equipment with the specifically useful structure to measure wafer stress. Secondly we made of the laser interferometry to inspect the wafer surface curvature based on the large deformation theory. And then the wafer surface fringe image was obtained by experiment, and the full field stress distribution of wafer surface comes into view by signal processing with thining and pitch mapping. After wafer was ground by 1mm and polished from the back side to get easily deformation, and it was heated by three to four times thermal treatments at about 1000 degree temperature. Finally the severe deformation between wafer before and after the heat treatment was shown.

Application of Modified Rapid Thermal Annealing to Doped Polycrystalline Si Thin Films Towards Low Temperature Si Transistors

  • So, Byung-Soo;Kim, Hyeong-June;Kim, Young-Hwan;Hwang, Jin-Ha
    • Korean Journal of Materials Research
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    • v.18 no.10
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    • pp.552-556
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    • 2008
  • Modified thermal annealing was applied to the activation of the polycrystalline silicon films doped as p-type through implantation of $B_2H_6$. The statistical design of experiments was successfully employed to investigate the effect of rapid thermal annealing on activation of polycrystalline Si doped as p-type. In this design, the input variables are furnace temperature, power of halogen lamps, and alternating magnetic field. The degree of ion activation was evaluated as a function of processing variables, using Hall effect measurements and Raman spectroscopy. The main effects were estimated to be furnace temperature and RTA power in increasing conductivity, explained by recrystallization of doped ions and change of an amorphous Si into a crystalline Si lattice. The ion activation using rapid thermal annealing is proven to be a highly efficient process in low temperature polycrystalline Si technology.

Improved Electrical Properties of Polysilicon TFT Using Rapid Thermal Processing (급속열처리 방식을 이용한 다결정 실리콘 소자의 형성된 전기적 특성)

  • 홍찬희;박창엽;이희국
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.12
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    • pp.1865-1869
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    • 1990
  • N-Channel polysilicon MOSFETs (W/L=20/1.5, 3, 5.10\ulcorner) were fabricated using RTP (Rapid Thermal Processor) and hydrogen passivation. The N+ source, drain and gate were annealed and recrystallized using RTP at temperature of 1000\ulcorner-1100\ulcorner. But the active areas were not specially crystallized before growing the gate oxide. Without the hydrogen passivarion, excellent transistor characteristics (ON/OFF=5.10**6, S=85MV/DEC, IL=51pA/\ulcorner) were obtained for 1.5\ulcorner MOSFET. Also the transistor characteristics were improved by hydrogen passivation.

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Study of Growth and Temperature Dependence of SnS Thin Films Using a Rapid Thermal Processing (황화급속열처리를 이용한 SnS 박막성장 및 온도의존성 연구)

  • Shim, Ji-Hyun;Kim, Jeha
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.2
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    • pp.95-100
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    • 2016
  • We fabricated a tin sulfide (SnS) layer with Sn/Mo/glass layers followed by a RTP (rapid thermal processing), and studied the film growth and structural characteristics as a function of annealing temperature and time. The elemental sulfur (S) was cracked thermally and applied to form SnS polycrystalline film out of the Sn percursor at pre-determined pressures in the RTP tube. The sulfurization was done at the temperature from $200^{\circ}C$ to $500^{\circ}C$ for a time period of 10 to 40 min. At ${\leq}300^{\circ}C$, 20 min., p-type SnS thin films was grown and showed the best composition of at.% of [S]/[Sn] $${\sim_=}$$ 1 and [111] preferred orientation as investigated from using XRD (X-ray diffraction) analysis and EDS (energy dispersive spectroscopy) and SEM (scanning electron microscopy), and optical absorption by a UV-VIS spectrometer. In this paper, we report the details of growth characteristics of single phase SnS thin film as a function of annealing temperature and time associated with the pressure and ambient gas in the RTP tube.

Development of numerical-computation program to predict thermal shock induced by fs laser processing of meatals (펨토초 레이저 금속 가공시 발생하는 열충격 수치계산 프로그램 개발)

  • O, Bu-Guk;Kim, Dong-Sik;Kim, Jae-Gu;Lee, Je-Hun
    • Laser Solutions
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    • v.11 no.1
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    • pp.19-24
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    • 2008
  • It has been recognized that laser dicing of wafers results in low mechanical strength compared to the conventional sawing techniques. Thermal shock generated by rapid thermal loading is responsible for this problem. This work presents a two-dimensional ultra-short thermo elastic model for numerical simulation of femtosecond laser ablation of metals in the high-fluence regime where the phase explosion is dominant. Laser-induced thermoelastic stress is analyzed for Ni. The results show that the laser-induced thermal shock is large enough to induce mechanical damages.

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A Study on Improvement of Flow Characteristics for Thin-Wall Injection Molding by Rapid Mold Heating (급속 금형가열에 의한 박육 사출성형의 유동특성 개선에 관한 연구)

  • Park Keun;Kim Byung H.
    • Transactions of Materials Processing
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    • v.15 no.1 s.82
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    • pp.15-20
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    • 2006
  • The rapid thermal response (RTR) molding is a novel process developed to raise the temperature of mold surface rapidly to the polymer melt temperature prior to the injection stage and then cool rapidly to the ejection temperature. The resulting filling process is achieved inside a hot mold cavity by prohibiting formation of frozen layer so as to enable thin wall injection molding without filling difficulty. The present work covers flow simulation of thin wall injection molding using the RTR molding process. In order to take into account the effects of thermal boundary conditions of the RTR mold, coupled analysis with transient heat transfer simulation is suggested and compared with conventional isothermal analysis. The proposed coupled simulation approach based on solid elements provides reliable thin wall flow estimation for both the conventional molding and the RTR molding processes.

Analysis of Temperature Distribution and slip in Rapid Thermal Processing (급속 열처리시 실리콘 웨이퍼의 온도분포와 슬립 현상의 해석)

  • Lee, Hyouk;Yoo, Young-Don;Earmme, Youn-Young;Shin, Hyun-Dong;Kim, Choong-Ki
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.16 no.4
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    • pp.609-620
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    • 1992
  • A numerical solution of temperature and thermally induced stress in a wafer during rapid thermal processing (R.T.P) is obtained, and an analysis of onset and propagation of slip is performed and compared with experiment. In order to calculate temperature distribution of a wafer in R.T.P system, heat conduction equation that incorporated with radiative and convective heat transfer model is solved, and the solution of the equation is calculated numerically using alternating direction implicit (A.D.I) method. In dealing with radiative heat transfer, a partially transparent body that absorbs the radiation energy is assumed and this transparent body undergoes multiple internal reflections and absorptions. Two dimensional (assuming plane stress) thermoelastic constitutive equation is used to calculate thermal stress induced in a wafer and finite element method is employed to solve the equation numerically. The stress resolved in the slip directions on the slip planes of silicon is compared with the yield stress of silicon in order to predict the slip. The result of the analysis shows that the wafer temperature at which slip occurs is affected by the heating rate of the R.T.P system. It is observed that once slip occurs in the wafer, the slip grows.

The optimal paremeter design of rapid thermal processing to improve wafer temperature uniformity on the semiconductor manufacturing (반도체 공정에서 웨이퍼의 온도균일도향상을 위한 고속열처리공정기의 최적 파라미터 설계)

  • 최성규;최진영;권욱현
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.1508-1511
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    • 1997
  • In this paper, design parameters of Rapid Thermal Processing(RrW) to minimize the wafer tempera ture uniformity errors are proposed. 1,anip ling positions and the wafer height are important parameters for waf er temperature uniformity in R'I'P. We propose the method to seek lamp ling positions and the wafer height for optimal temperature uniformity. l'he ~~roposed method is applied to seek optimal lamp ling positions and the waf er height of 8 inch wafer. 'I'o seek the optimal lamp ling positions and the wafer height, we var\ulcorner. lamp ling 110s itions and the wafer height and then formulate the wafer temperature uniformity problem to the linear programmi ng problem. Finally, it is shown that the wafer temperature uniformity in RI'I' designed by optimal prarneters is improved to comparing with Ii'l'P designed by the other method.

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A study on the optimal parameter design of rapid thermal processing to improve wafer temperature uniformity (8인치 웨이퍼의 온도균일도향상을 위한 고속열처리공정기의 최적 파라미터에 설게에 관한 연구)

  • 최성규;최진영;권욱현
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.10
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    • pp.68-76
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    • 1997
  • In this paper, design parameters of rapid thermal processing(RTP) to minimize the wafer temperature uniformity errors are proposed. Lamp ring positions and the wafer height are important parameters for wafer temperature uniformity in RTP. We propose the method to seek lamp ring positions and the wafer gheight for optimal temperature uniformity. The proposed method is applied to seek optimal lamp ring positions and the wafer feight of 8 inch wafer. To seek the optimal lamp ring positions and the wafer height, we vary lamp ring positions and the wafer height and then formulate the wafer temperature uniformity problem to the linear programming problem. Finally, it is shown that the wafer temperature uniformity in RTP designed by optimal problem. Finally, it is hsown that the wafer temperature uniformity is RTP designed by optimal parameters is improved to comparing with RTP designed by the other method.

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