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Design of an Efficient LDPC Codec for Hardware Implementation (하드웨어 구현에 적합한 효율적인 LDPC 코덱의 설계)

  • Lee Chan-Ho;Park Jae-Geun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.7 s.349
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    • pp.50-57
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    • 2006
  • Low-density parity-check (LDPC) codes are recently emerged due to its excellent performance. However, the parity check (H) matrices of the previous works are not adequate for hardware implementation of encoders or decoders. This paper proposes a hybrid parity check matrix which is efficient in hardware implementation of both decoders and encoders. The hybrid H-matrices are constructed so that both the semi-random technique and the partly parallel structure can be applied to design encoders and decoders. Using the proposed methods, the implementation of encoders can become practical while keeping the hardware complexity of the partly parallel decoder structures. An encoder and a decoder are designed using Verilog-HDL and compared with the previous results.

A Robust Biometric-based User Authentication Protocol in Wireless Sensor Network Environment (무선센서네트워크 환경에서 생체기반의 개선된 사용자 인증 프로토콜)

  • Shin, Kwang-Cheul
    • The Journal of Society for e-Business Studies
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    • v.18 no.3
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    • pp.107-123
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    • 2013
  • In a wireless sensor network environment, it is required to ensure anonymity by keeping sensor nodes' identifiers not being revealed and to support real-time authentication, lightweight authentication and synchronization. In particular, there exist possibilities of location information leakage by others, privacy interference and security vulnerability when it comes to wireless telecommunications. Anonymity has been an importance issue in wired and wireless network environment, so that it has been studied in wide range. The sensor nodes are interconnected among them based on wireless network. In terms of the sensor node, the researchers have been emphasizing on its calculating performance limit, storage device limit, and smaller power source. To improve of biometric-based D. He scheme, this study proposes a real-time authentication protocol using Unique Random Sequence Code(URSC) and variable identifier for enhancing network performance and retaining anonymity provision.

Multi-mode Embedded Compression Algorithm and Architecture for Code-block Memory Size and Bandwidth Reduction in JPEG2000 System (JPEG2000 시스템의 코드블록 메모리 크기 및 대역폭 감소를 위한 Multi-mode Embedded Compression 알고리즘 및 구조)

  • Son, Chang-Hoon;Park, Seong-Mo;Kim, Young-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.41-52
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    • 2009
  • In Motion JPEG2000 encoding, huge bandwidth requirement of data memory access is the bottleneck in required system performance. For the alleviation of this bandwidth requirement, a new embedded compression(EC) algorithm with a little bit of image quality drop is devised. For both random accessibility and low latency, very simple and efficient entropy coding algorithm is proposed. We achieved significant memory bandwidth reductions (about 53${\sim}$81%) and reduced code-block memory to about half size through proposed multi-mode algorithms, without requiring any modification in JPEG2000 standard algorithm.

FPGA Design and SoC Implementation of Constant-Amplitude Multicode Bi-Orthogonal Modulation (정진폭 다중 부호 이진 직교 변복조기의 FPGA 설계 및 SoC 구현)

  • Hong, Dae-Ki;Kim, Yong-Seong;Kim, Sun-Hee;Cho, Jin-Woong;Kang, Sung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.11C
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    • pp.1102-1110
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    • 2007
  • In this paper, we design the FPGA (Field-Programmable Gate Array) of the CAMB (Constant-Amplitude Multi-code Biorthogonal) modulation, and implement the SoC (System on Chip). The ASIC (Application Specific Integrated Circuit) chip is be implemented through targeting and board test. This 12Mbps modem SoC includes the ARM (Advanced RISC Machine)7TDMI, 64Kbyte SRAM(Static Random Access Memory) and ADC (Analog to Digital Converter)/DAC (Digital to Analog Converter) for flexible applications. Additionally, the modem SoC can support the variable communication interfaces such as the 16-bits PCMCIA (Personal Computer Memory Card International Association), USB (Universal Serial Bus) 1.1, and 16C550 Compatible UART (Universal Asynchronous Receiver/Transmitter).

Performance Evaluation of Underwater Code Division Multiple Access Scheme on Forward-Link through Water-Tank and Lake Experiment (수조 및 저수지 실험을 통한 수중 코드 분할 다중 접속 기법 순방향 링크 성능 분석)

  • Seo, Bo-Min;Son, Kweon;Cho, Ho-Shin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39C no.2
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    • pp.199-208
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    • 2014
  • Code division multiple access (CDMA) is one of the promising medium access control (MAC) schemes for underwater acoustic sensor networks because of its robustness against frequency-selective fading and high frequency-reuse efficiency. As a way of performance evaluation, sea or lake experiment has been employed along with computer simulation.. In this study, we design the underwater CDMA forward-link transceiver and evaluate the feasibility aginst harsh underwater acoustic channel in water-tank first. Then, based on the water-tank experiment results, we improved the transceiver and showed the improvements in a lake experiment. A pseudo random noise code acquisition process is added for phase error correction before decoding the user data by means of a Walsh code in the receiver. Interleaving and convolutional channel coding scheme are also used for performance improvement. Experimental results show that the multiplexed data is recovered by means of demultiplexing at receivers with error-free in case of two users while with less than 15% bit error rate in case of three and four users.

An interleaver to reduce the edge-effect in turbo codes with CRC (CRC를 사용한 터보부호에서 edge-effect를 감소시키기 위한 인터리버)

  • Lee, Byeong-Gil;Bae, Sang-Jae;Jeong, Geon-Hyeon;Ju, Eon-Gyeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.4
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    • pp.165-172
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    • 2002
  • In the next generation mobile communications, powerful channel coding is essential in order to obtain high quality multimedia services. Turbo code can achieve good error performance by iterative decoding, but more iterations result in additional computational complexity and delay. Thus, a method to reduce the number of iterations without additional performance degradation is needed. Turbo code with CRC is known to be the most efficient method to reduce the number of iterations. In this scheme, the performance may be degraded by the edge-effect like the conventional turbo code without CRC. In this paper, a method to eliminate the edge-effect is proposed by adopting D-parameter to the conventional s-random interleaver. As results of simulation, the edge-effect of the turbo code with CRC is shown to be successfully eliminated by using the new interleaver designed with D-parameter.

Near-Range Object Detection System Based on Code Correlation (코드 상관을 이용한 근거리 물체 탐지 장치)

  • Yoo, Ho-Sang;Gimm, Youn-Myoung;Jung, Jong-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.4 s.119
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    • pp.455-463
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    • 2007
  • In this paper, it is proposed how to implement the object detection system which is able to apply to vehicular applications, unmanned facilities, automatic door and others with microwave. As the technology which detects an object with microwave is becoming more popular, it seems impossible to avoid mutual interference and jamming caused by limited frequency bandwidth. The system in this paper detects an object by correlating the code of TX and RX signals with the pseudo-random code having best quality in interference and jamming environment. In order to generate simulant doppler signal for detecting the distance of an fixed object where there is no doppler effect, the phase of TX signal is shifted continually. Also, the saturation of receiver was removed and the error of distance measurement was decreased by controlling the power of TX signal for getting constant RX signal. The proposed system detects a object which ranges from 0.5 m to 2.0 m and informs vocally whether there is the object within 1.0 m or not.

Analysis of Fatigue Truck Model for LRFD Code (LRFD 설계기준(안) 피로설계트럭 모형 분석)

  • Cho, Eun Young;Shin, Dong Ku
    • Journal of Korean Society of Steel Construction
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    • v.21 no.3
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    • pp.331-342
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    • 2009
  • A reliability analysis of the fatigue failure of highway steel bridges was performed by applying the Miner's fatigue damage rule for the fatigue design truck proposed for the LRFD code and for the current DB 24 truck. The limit state function for fatigue failure is expressed as a function of various random variables that affect fatigue damage. Among these variables, the statistical parameters for the equivalent moment, the impact factor, and the loadometer were obtained by analyzing recently measured domestic traffic data, and the parameters for the fatigue strength, the girder distribution factor, and the headway factor were obtained from the measured data reported in literature. Based on the reliability analysis, the fatigue truck model for the LRFD code was proposed. After applying the proposed fatigue truck to the LRFD code, 16 composite plate and box girder bridges were designed based on the LRFD method, and the LRFD design results for the fatigue limit state were compared with those by the current KHBDC.

Evaluation of seismic reliability of structures designed accoring to current seismic design provision (UBC) (현행 내진 설계규준(UBC)으로 설계된 구조물의 내진 신뢰성 평가)

  • 한상환;이리형
    • Computational Structural Engineering
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    • v.8 no.3
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    • pp.113-122
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    • 1995
  • The purpose of this study is to evaluate performance and safety of structures designed according to current seismic code or provisions (e.g., Uniform Building Code(UBC), NEHRP provisions, etc.) during lifetime of structures. The performance is represented in terns of reliability in this paper. To perform reliability analyses, a large number of time history response analyses for a given structure are usually required. In this study, to perform reliability analyses ground motions are generated based on nonstationary random process and structures are designed based on UBC. In this paper, responses of structures under a given earthquake is evaluated using dynamic nonlinear time history analyses and also an equivalent nonlinear system (ENS) with response scaling factors. The ENS system is described in the companion paper. Therefore, this paper evaluates the seismic performance of structures and also verify the accuracy of ENS.

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A Design of Viterbi Decoder by State Transition Double Detection Method for Mobile Communication (상태천이 이중검색방식의 이동통신용 Viterbi 디코더 설계)

  • 김용노;이상곤;정은택;류흥균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.4
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    • pp.712-720
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    • 1994
  • In digital mobile communication systems, the convolutional coding is considered as the optimum error correcting scheme. Recently, the Viterbi algorithm is widely used for the decoding of convolutional code. Most Viterbi decoder has been proposed in conde rate R=1/2 or 2/3 with memory components (m) less than 3. which degrades the error correcting capability because of small code constraints (K). We consider the design method for typical code rate R=1/2, K=7(171,133) convolutional code with memory components, m=6. In this paper, a novel construction method is presented which combines maximum likelihood decoding with a state transition double detection and comparison method. And the designed circuit has the error-correcting capability of random 2 bit error. As the results of logic simulation, it is shown that the proposed Viterbi decoder exactly corrects 1 bit and 2 bit error signal.

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