• Title/Summary/Keyword: Ramp-edge junction

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Transport Properties of Ramp-Edge Junction with Columnar Defects (원통형 결함을 포함한 Ramp-Edge Junction의 수송특성)

  • Lee, C. W.;Kim, D. H.;Lee, T. W.;Sung, Gun-Yong;Kim, Sang-Hyeob
    • Progress in Superconductivity
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    • v.3 no.1
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    • pp.65-69
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    • 2001
  • We measured the transport properties of$ YBa_2$$Cu_3$$O_{x}$ ramp-edge junction fabricated with interface-engineered barrier. The current-voltage characteristics show a typical resistively-shunted junction like behavior Voltage noise measurement revealed that the main source of the 1/f noise is the critical current and resistance fluctuations. The analysis of the noise data showed that the critical current fluctuations increase with temperature, whereas the resistance fluctuations are almost constant, and both fluctuations are almost correlated. The smaller magnitude of the critical current and resistance fluctuations seems to result from the columnar-deflects.s.

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Large Tunneling Magnetoresistance of a Ramp-type Junction with a SrTiO3 Tunneling Barrier

  • Lee, Sang-Suk;Yoon, Moon-Sung;Hwang, Do-Guwn;Rhie, Kung-Won
    • Journal of Magnetics
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    • v.8 no.2
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    • pp.89-92
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    • 2003
  • The tunneling magnetoresistance (TMR) of a ramp-edge type junction with SrTiO$_3$barrier layer has been stud-ied. The samples with a structure of glass/NiO(600${\AA}$)/Co(100${\AA}$)/SrTiO$_3$(400 ${\AA}$)/SrTiO$_3$(20-100${\AA}$)/NiFe(100${\AA}$) were prepared by the sputtering and etched by the electron cyclotron (ECR) argon ion milling. Nonlinear I-V characteristics were obtained from a ramp-type tunneling junctions, having the dominant difference between two different external magnetic fields (${\pm}$100 Oe) perpendicular to the junction edge line. In the SrTiO$_3$ barrier thickness of 40${\AA}$, the TMR was 52.7% at a bias voltage of -50 mV The bias voltage dependence of resistance and TMR in a ramp-type tunneling junction was similar with those of the layered TMR junction.

Junction, Circuit and System Developments for a High-Tc Superconductor Sampler

  • Hidaka, M.;Satoh, T.;Tahara, S.
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.13-15
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    • 1999
  • A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

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Junction, Circuit and System Developments for a High-$T_c$ Superconductor Sampler

  • Hidaka, M.;Satoh, T.;Tahara, S.
    • Progress in Superconductivity
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    • v.1 no.2
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    • pp.81-84
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    • 2000
  • A Josephson sampler circuit using high-Tc superconductor (HTS) ramp-edge junctions has been designed, fabricated, and experimentally tested. It consists of five ramp-edge junctions with a stacked groundplane and is based on single-flux-quantum (SFQ) operations. The sampler was used to measure current waveforms at picosecond and microampere resolutions. We are developing a system based on the sampler for measuring the current waveform in a room-temperature sample. And measuring current flowing through wiring in a semiconductor large-scale integrated circuit is a promising application for the HTS sampler system.

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Fabrication and Characterization of High Temperature in-situ Ramp-edge Type Josephson Junction (고온초전도체 in-situ ramp-edge 형태의 조셉슨 접합 제작 및 특성)

  • Hur, Yun-Sung;Kim, Jin-Tae;Hwang, Yun-Seok;Lee, Sun-Gul;Park, Gwang-Seo;Kim, In-Seon;Park, Yong-Ki;Park, Jong-Chul
    • Korean Journal of Materials Research
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    • v.8 no.3
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    • pp.263-267
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    • 1998
  • In this study, we have fabricated in-situ multilayer $YBa_2Cu_3O_{7-\delta}$/$SrTiO_{3}$/$YBa_2Cu_3O_{7-\delta}$ ramp edge type junctions by using a metal mask and pulsed laser deposition method and studied the junction properties. The junctions showed RSJ-like I-V characteristics. The normal state junction resistance R, of $18 \omega$ was nearly constant with temperature. The dc-SQUID sensors fabricated with the junctions show a sensitivity that transfer function dV/$d\Phi$)~$22\mu$V/$\Phi_{0}$, indicating that the in-situ ramp edge type junction is potentially useful for sensor application.

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Demonstration of rapid single-flux-quantum RS flip-flop using YBCO/Co-YBCO/YBCO ramp-edge Josephson junction with and without ground plane (YBCO/Co-YBCO/YBCO ramp-edge 접합을 이용한 RS flip-flop 회로 제작과 동작)

  • Kim, Jun-Ho;Sung, Geon-Yong;Park, Jong-Hyeok;Kim, Chang-Hun;Jung, Gu-Rak;Hahn, Taek-Sang;Kang, Jun-Hui
    • 한국초전도학회:학술대회논문집
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    • v.10
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    • pp.189-192
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    • 2000
  • We fabricated rapid single-flux-quantum RS flip-flop circuits with and without Y$_1$Ba$_2$Cu$_3$O$_{7-{\delta}}$(YBCO) ground plane. The circuit consists of SNS-type ramp-edge Josephson junctions that have cobalt-doped YBCO and Sr$_2$AITaO$_6$(SAT) for barrier layer and insulator layer, respectively. The fabricated Josephson junction showed a typical RSJ-like current-voltage(I-V) characteristics above 50K. We sucessfuly demonstrated RS flip-flop at temperatures around 50K. The RS flip-flop fabricated on ground plane showed more definite set and reset state in voltage-flux(V-${\phi}$) modulation curve for read SQUID, which may be attributed to a shielding effect of the YBCO ground plane.

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HTS Josephson Junctions with Deionized Water Treated Interface (증류수 계면처리를 이용한 고온초전도체 죠셉슨 접합 제작)

  • Moon, S.H.;Park, W.K.;Kye, J.I.;Park, J.D.;Oh, B.
    • Progress in Superconductivity
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    • v.2 no.2
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    • pp.76-80
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    • 2001
  • We have fabricated YBa$_2$Cu$_3$$O_{7-x}$ (YBCO) ramp-edge Josephson junctions by modifying ramp edges of the base electrodes without depositing any artificial barrier layer. YBa$_2$Cu$_3$O/7-x//SrTiO$_3$ (YBCO/STO) films were deposited on SrTiO$_3$(100) by on-axis KrF laser deposition. After patterning the bottom YBCO/STO layer, the ramp edge was cleaned by ion-beam and then reacted with deionized water under various conditions prior to the deposition of counter-electrode layers. The top YBCO/STO layer was deposited and patterned by photolithography and ion milling. We measured current-voltage (I-V) characteristics, magnetic field modulation of the critical current at 77 K. Some showed resistively shunted junction (RSJ)-type I-V characteristics, while others exhibited flux-flow behaviors, depending on the dipping time of the ramp edge in deionized water. Junctions fabricated using optimized conditions showed fairly uniform distribution of junction parameters such as I$_{c}$R$_{n}$ values, which were about 0.16 mV at 77 K with 1$\sigma$~ 24%. We made a dc SQUID with the same deionized water treated junctions, and it showed the sinusoidal modulation under applied magnetic field at 77 K. 77 K.

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Tunneling Magnetoresistance of a Ramp-edge Type Junction With Si3N4 Barrier (Si3N4장벽층을 이용한 경사형 모서리 접합의 터널링 자기저항 특성)

  • Kim, Young-Ii;Hwang, Do-Guwn;Lee, Sang-Suk
    • Journal of the Korean Magnetics Society
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    • v.12 no.6
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    • pp.201-205
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    • 2002
  • The tunneling magnetoresistance (TMR) of a ramp-edge type junction has been studied. The samples with a structure of NiO(60)/Co(10)/NiO(60)/Si$_3$N$_4$(2-6)/NiFe(10) (nm) were prepared by the sputtering and etched by the electron cyclotron (ECR) argon ion milling. Nonlinear I-V characteristics was obtained from a ramp-type tunneling junctions having the dominant difference between zero and +90 Oe perpendicular to the junction edge line. The voltage dependence of TMR was stable up to a bias volt of $\pm$10 V with a TMR ratio of about -10%, which may be very peculiar magnetic tunneling properties with asymmetric tunneling process between wedge Co pinned layer and NiFe free layer.

Fabrication of interface-controlled Josephson junctions using Sr$_2$AlTaO$_6$ insulating layers

  • Kim, Jun-Ho;Choi, Chi-Hong;Sung, Gun-Yong
    • 한국초전도학회:학술대회논문집
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    • v.10
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    • pp.165-168
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    • 2000
  • We fabricated ramp-edge Josephson junctions with barriers formed by interface treatments instead of epitaxially grown barrier layers. A low-dielectric Sr$_2$AlTaO$_6$(SAT) layer was used as an ion-milling mask as well as an insulating layer for the ramp-edge junctions. An ion-milled YBa$_2$Cu$_3$O$_{7-x}$ (YBCO)-edge surface was not exposed to solvent through all fabrication procedures. The barriers were produced by structural modification at the edge of the YBCO base electrode using high energy ion-beam treatment prior to deposition of the YBCO counter electrode. We investigated the effects of high energy ion-beam treatment, annealing, and counter electrode deposition temperature on the characteristics of the interface-controlled Josephson junctions. The junction parameters such as T$_c$, I$_c$c, R$_n$ were measured and discussed in relation to the barrier layer depending on the process parameters.

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