• Title/Summary/Keyword: RSA암호

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Enhanced Polynomial Selection Method for GNFS (GNFS를 위한 향상된 다항식 선택 기법)

  • Kim, Suhri;Kwon, Jihoon;Cho, Sungmin;Chang, Nam Su;Yoon, Kisoon;Han, Chang;Park, Young-Ho;Hong, Seokhie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.26 no.5
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    • pp.1121-1130
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    • 2016
  • RSA cryptosystem is one of the most widely used public key cryptosystem. The security of RSA cryptosystem is based on hardness of factoring large number and hence there are ongoing attempt to factor RSA modulus. General Number Field Sieve (GNFS) is currently the fastest known method for factoring large numbers so that CADO-NFS - publicly well-known software that was used to factor RSA-704 - is also based on GNFS. However, one disadvantage is that CADO-NFS could not always select the optimal polynomial for given parameters. In this paper, we analyze CADO-NFS's polynomial selection stage. We propose modified polynomial selection using Chinese Remainder Theorem and Euclidean Distance. In this way, we can always select polynomial better than original version of CADO-NFS and expected to use for factoring RSA-1024.

Implementation of Smart Card Operating System using RSA Cryptographic Algorithm (RSA 암호 알고리즘을 이용한 스마트카드의 운영체제 구현)

  • 김증섭;장유탁;김정준;김태근;유기영
    • Proceedings of the Korean Information Science Society Conference
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    • 1998.10c
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    • pp.700-702
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    • 1998
  • 스마트카드 운영체제는 카드와 터미널간의 인증(authentication), 메시지 처리 및 메시지 처리시 비밀성(security) 유지 등의 작업을 수행한다. 본 논문은 스마트카드에서 DES 암호 알고리즘보다 보안성이 뛰어나고, 다양한 응용을 지원하기 위해서 RSA 암호 알고리즘을 이용한 확장 가능한 운영체제를 구현한다. 스마트카드 시스템과 운영체제의 구조는 ISO/IEC 7816 규정을 따르고 있었고, 몽고메리 알고리즘을 이용한 RSA 암호 알고리즘은 스마트카드에서 인증과 스마트카드 내에서 파일의 보안성, 메시지 보안 명령어를 안전하게 수행한다. 본 논문에서 제시한 스마트카드 운영체제는 다양한 응용을 지원하기 위하여 응용 목적에 따라 운영체제와 응용 프로그램을 확장할 수 있게 설계되었다.

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An Experimental Fault Injection Attack on RSA Cryptosystem using Abnormal Source Voltage (비정상 전원 전압을 이용한 RSA 암호 시스템의 실험적 오류 주입 공격)

  • Park, Jea-Hoon;Moon, Sang-Jae;Ha, Jae-Cheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.19 no.5
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    • pp.195-200
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    • 2009
  • CRT-based RSA algorithm, which was implemented on smartcard, microcontroller and so on, leakages secret primes p and q by fault attacks using laser injection, EM radiation, ion beam injection, voltage glitch injection and so on. Among the many fault injection methods, voltage glitch can be injected to target device without any modification, so more practical. In this paper, we made an experiment on the fault injection attack using abnormal source voltage. As a result, CRT-RSA's secret prime p and q are disclosed by fault attack with voltage glitch injection which was introduced by several previous papers, and also succeed the fault attack with source voltage blocking for proper period.

Design of RSA cryptographic circuit for small chip area using refined Montgomery algorithm (개선된 몽고메리 알고리즘을 이용한 저면적용 RSA 암호 회로 설계)

  • 김무섭;최용제;김호원;정교일
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.5
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    • pp.95-105
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    • 2002
  • This paper describes an efficient method to implement a hardware circuit of RSA public key cryptographic algorithm, which is important to public-key cryptographic system for an authentication, a key exchange and a digital signature. The RSA algorithm needs a modular exponential for its cryptographic operation, and the modular exponential operation is consists of repeated modular multiplication. In a numerous algorithm to compute a modular multiplication, the Montgomery algorithm is one of the most widely used algorithms for its conspicuous efficiency on hardware implementation. Over the past a few decades a considerable number of studies have been conducted on the efficient hardware design of modular multiplication for RSA cryptographic system. But many of those studies focused on the decrease of operating time for its higher performance. The most important thing to design a hardware circuit, which has a limit on a circuit area, is a trade off between a small circuit area and a feasible operating time. For these reasons, we modified the Montgomery algorithm for its efficient hardware structure for a system having a limit in its circuit area and implemented the refined algorithm in the IESA system developed for ETRI's smart card emulating system.

Fast Factorization Methods based on Elliptic Curves over Finite Fields (유한체위에서의 타원곡선을 이용한 고속 소인수분해법에 관한 연구)

  • Kim, Yong-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.10
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    • pp.1093-1100
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    • 2015
  • Since the security of RSA cryptosystem depends on the difficulty of factoring integers, it is the most important problem to factor large integers in RSA cryptosystem. The Lenstra elliptic curve factorization method(ECM) is considered a special purpose factoring algorithm as it is still the best algorithm for divisors not greatly exceeding 20 to 25 digits(64 to 83 bits or so). ECM, however, wastes most time to calculate $M{\cdot}P$ mod N and so Montgomery and Koyama both give fast methods for implementing $M{\cdot}P$ mod N. We, in this paper, further analyze Montgomery and Koyama's methods and propose an efficient algorithm which choose the optimal parameters and reduces the number of multiplications of Montgomery and Koyama's methods. Consequently, the run time of our algorithm is reduced by 20% or so than that of Montgomery and Koyama's methods.

Design and Performance Analysis of SOAP based ebXML Cryptography Systems (SOAP기반의 ebXML 암호화 설계 및 성능분석)

  • Kang, Min-Goo
    • The Journal of the Korea Contents Association
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    • v.6 no.11
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    • pp.1-7
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    • 2006
  • In this paper, a SOAP based ebXML cryptography system is proposed for the optimum XML document encryption using RSA algorithm in e-Marketplace. And ciphering algorithms of DES, 3DES, RSA, and proposed RSA were used for the performance analysis of ebXML cryptography system. The network performance of ciphering and deciphering times is evaluated for its enhancement of SOAP based ebXML ciphering e-Marketplace systems using the same block and document sizes by computer simulations.

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RI-RSA system design to increase security between nodes in RFID/USN environments (RFID/USN 환경에서 노드들간의 보안성 증대를 위한 RI-RSA 시스템 설계)

  • Lee, Seon-Keun
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.11
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    • pp.157-162
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    • 2010
  • Due to the IT development, RFID/USN became very familiar means of communication. However, because of increased number, security, and size constraints of nodes, it is insufficient to implement a variety of services. To solve these problems, this paper suggests RI-RSA, which is an appropriate asymmetric cryptographic system for RFID/USN environment. The proposed RI-RSA cryptographic system is easy to implement. To increase the processing speed, RI-RSA was suggested by subdividing the multiplication section into two-dimensional, where bottleneck phenomena occurs, and it was implemented in the hardware chip level. The simulation result verified that it caused 6% of circuit reduction, and for the processing speed, RI-RSA was 30% faster compare to the existing RSA.

A Study on the Modulus Multiplier Speed-up Throughput in the RSA Cryptosystem (RSA 암호시스템의 모듈러 승산기 처리속도 향상을 위한 연구)

  • Lee, Seon-Keun;Jeung, Woo-Yeol
    • The Journal of the Korea institute of electronic communication sciences
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    • v.4 no.3
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    • pp.217-223
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    • 2009
  • Recently, the development of the various network method can generate serious social problems. So, it is highly required to control security of network. These problems related security will be developed and keep up to confront with anti-security field such as hacking, cracking. The way to preserve security from hacker or cracker without developing new cryptographic algorithm is keeping the state of anti-cryptanalysis in a prescribed time by means of extending key-length. In this paper, the proposed montgomery multiplication structured unit array method in carry generated part and variable length multiplication for eliminating bottle neck effect with the RSA cryptosystem. Therefore, this proposed montgomery multiplier enforce the real time processing and prevent outer cracking.

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Design and FPGA Implementation of a High-Speed RSA Algorithm for Digital Signature (디지털 서명을 위한 고속 RSA 암호 시스템의 설계 및 FPGA 구현)

  • 강민섭;김동욱
    • The KIPS Transactions:PartC
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    • v.8C no.1
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    • pp.32-40
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    • 2001
  • In this paper, we propose a high-speed modular multiplication algorithm which revises conventional Montgomery's algorithm. A hardware architecture is also presented to implement 1024-bit RSA cryptosystem for digital signature based on the proposed algorithm. Each iteration in our approach requires only one addition operation for two n-bit integers, while that in Montgomery's requires two addition operations for three n-bit integers. The system which is modelled in VHDL(VHSIC Hardware Description Language) is simulated in functionally through the use of $Synopsys^{TM}$ tools on a Axil-320 workstation, where Altera 10K libraries are used for logic synthesis. For FPGA implementation, timing simulation is also performed through the use of Altera MAX + PLUS II. Experimental results show that the proposed RSA cryptosystem has distinctive features that not only computation speed is faster but also hardware area is drastically reduced compared to conventional approach.

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A New Modular Arithmetic Algorithm and its Hardware Structure for RSA Cryptography System (RSA 암호 시스템의 고속 처리를 위한 새로운 모듈로 연산 알로리즘 및 하드웨어 구조)

  • 정용진
    • Proceedings of the Korean Information Science Society Conference
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    • 1999.10a
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    • pp.646-648
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    • 1999
  • 본 논문에서는 RSA 암호 알고리즘의 핵심 계산 과정인 모듈로 곱셈 연산의 효율적인 하드웨어 구현을 위해 새로운 알고리즘과 하드웨어 구조를 제시한다. 기존의 몽고메리 알고리즘이 LSB 우선 방법을 사용한 것과는 달리 여기서는 MSB 우선 방법을 사용하였으며, RSA 암호 시스템에서 키가 일정 기간 동안 변하지 않고 유지된다는 점에 착안해 계수(Modulus)에 대한 보수(Complements)를 미리 계산해 놓고 이를 이용하여 모듈로 감소 처리를 간단히 덧셈으로 치환하도록 하였다. 보수들을 저장할 몇 개의 레지스터와 그들 중 하나를 선택하기 위한 간단한 멀티플렉서(Multiplexer)만을 추가함으로써 몽고메리 알고리즘이 안고 있는 홀수 계수 조건과 사후 연산이라는 번거로움을 없앨 수 있다. 본 논문에서 제안하는 알고리즘은 하드웨어 복잡도가 몽고메리 알고리즘과 비슷하며 그 내부 계산 구조를 보여주는 DG(Dependence Graph)의 지역 연결성 (Local Connection), 모듈성(Modularity), 데이터의 규칙적 종속성 (Regular Data Dependency)등으로 인한 실시간 고속 처리를 위한 VLSI 구현에 적합하다.

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