• Review of KIISC
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• v.16 no.4
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• pp.7-14
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• 2006

NP-Hard 문제인 정수의 소인수분해 알고리즘의 연구와 구현은 1978년 RSA 암호의 개발과 함께 암호학에서 중요한 문제로 부각되었으며 지난 25년간 이 분야에서 많은 발전이 이룩되었다. QS 인수분해 알고리즘과 NFS 인수분해 알고리즘이 최근까지도 RSA-challenge를 분석하기 위한 도구로 사용되었고, NFS가 가장 효율적인 것으로 알려져 있다. 그러나 인수분해 대상 정수의 크기가 커짐에 따라 기존의 소프트웨어 기반의 접근 방법으로 분석하는 것은 점차 어려워지고 있다. 99년도 CHES Rump Session에서 Shamir에 의해 제안된 TWINKLE은 인수분해 알고리즘의 연구에 새 지평을 마련하였다. TWINKLE는 기존과는 근본적으로 다른 접근 방법으로 수행되는 인수분해 전용 하드웨어 장비이다. TWINKLE이 발표된 이후 TWIRL와 SHARK 등 다양한 인수분해 전용 하드웨어들이 제안되었고, 이는 인수분해 방법론 연구에서 새로운 방향이 되고 있다. 본 논문에서는 이와 같은 인수분해 전용 하드웨어 연구 동향에 대해 살펴보고, 각 장비들의 효율성을 비교 분석하도록 한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.4
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• pp.242-250
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• 2014

Conventional researches of standard tool validating cryptographic algorithm have been studied for the internet environment, for the mobile internet. It is important to develop the validation tool for establishment of interoperability and convenience of users in the information systems. Therefore, this paper presents the validation tool of Elliptic Curve Cryptography algorithm that can test if following X9.62 technology standard specification. The validation tool can be applied all information securities using DES, SEED, AES, SHA-1/256/384/512, RSA-OAEP V2.0, V2.1, ECDSA, ECKCDSA, ECDH, etc. Moreover, we can enhance the precision of validation through several experiments and perform the validation tool in the online environment.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.6
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• pp.1329-1342
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• 2018

Recent advances in quantum computer development have raised the issue of the security of RSA and elliptic curve cryptography, which are widely used. In response, the National Institute of Standards and Technology(NIST) is working on the standardization of public key cryptosystem which is secure in the quantum computing environment. Lattice-based cryptography is a typical post-quantum cryptography(PQC), and various lattice-based cryptographic schemes have been proposed for NIST's PQC standardization contest. Among them, EMBLEM proposed a new multi-bit encryption method which is more intuitive and efficient for encryption and decryption phases than the existing LWE-based encryption schemes. In this paper, we propose a multi-bit encryption scheme with improved efficiency using LWR assumption. In addition, we prove the security of our schemes and analyze the efficiency by comparing with EMBLEM and R.EMBLEM.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.6
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• pp.63-70
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• 2009

Many research results show that RSA system mounted using conventional binary exponentiation algorithm is vulnerable to some physical attacks. Recently, Schmidt and Hurbst demonstrated experimentally that an attacker can exploit secret key using faulty signatures which are obtained by skipping the squaring operations. Based on similar assumption of Schmidt and Hurbst's fault attack, we proposed new fault analysis attacks which can be made by skipping the multiplication operations or computations in looping control statement. Furthermore, we applied our attack to Montgomery ladder exponentiation algorithm which was proposed to defeat simple power attack. As a result, our fault attack can extract secret key used in Montgomery ladder exponentiation.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1992.11a
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• pp.41-54
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• 1992

본 논문에서는 정보를 효율적으로 저장, 관리, 전송할 수 있는 기능을 담당하는 분산 디렉토리 시스템（X. 500시리즈）의 모델과 MHS와의 연계 방안을 알아 보고, 이 시스템에서의 인증 방식 중의 하나인 상세 인증（strong authentication）의 문제점과 그 해결 방안을 제시하였다. 또한 X. 509 권고안에서의 디지털 서명을 생성하는 구체적인 방법으로 특정 성질을 갖는 공개키 암호 방식인 RSA를 이용하였으나 본 논문에서는 ElGamal 방식을 분산 디렉토리 시스템에 적용시킴으로써 RSA 방식이 아닌 다른 방식도 X. 509에 적용 가능하다는 것을 보였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2021.05a
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• pp.167-170
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• 2021

현재, 주요 선진국들을 포함하여 Google과 IBM과 같은 국제 대기업들을 필두로 양자 컴퓨터 개발에 전폭적인 투자들을 하고 있다. 양자 컴퓨터는 특정 분야에 있어 월등한 계산 능력을 보여주며, 기존 컴퓨터에서는 해결할 수 없던 몇몇 문제들을 빠른 시간 내에 해결한다. 이러한 양자 컴퓨터의 등장은 기존 컴퓨터에서는 사실상 풀 수 없는 암호 알고리즘들을 빠른 시간 내에 해결하여 암호학계에 큰 위협이 되고 있다. 현재 사용하고 있는 대부분의 공개키 암호 알고리즘인 RSA와 ECC(Elliptic Curve Cryptography) 또한 공격 대상이다. NIST에서는 다가오는 양자 컴퓨터 시대에 대비하여 양자내성암호 공모전을 주최하였으며 현재 라운드 3에 도입하였다. 본 논문에서는 라운드 3의 후보 알고리즘인 코드기반암호를 공격하는 ISD(Information Set Decoding) 알고리즘에 관한 동향을 조사하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2023.11a
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• pp.1189-1190
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• 2023

양자 컴퓨터가 발전함에 따라 RSA, ECC 등 기존 공개키 암호 알고리즘의 해독 가능성이 점점 커지고 있으며, 이러한 양자 위협에 대응하기 위해 양자 내성을 갖는 암호, 즉 PQC에 관한 연구가 활발하게 이루어지고 있다. 국가·공공기관에서 도입하는 보안 제품에서 암호 기능을 사용시 검증필 암호 모듈 탑재가 필요하지만, 현재 NIST는 표준화 대상 알고리즘만 선정하였을 뿐 국내외 모두 표준화가 완료되지 않아 PQC는 KCMVP 검증대상 암호로 포함되어 있지 않다. 본 논문에서는 KCMVP(국내 암호 모듈 검증 체계)와 PQC의 최근 동향을 알아보고 KCMVP에 PQC알고리즘을 도입할 때의 고려 사항에 대해 분석한다.

• Journal of the Korea Society of Computer and Information
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• v.17 no.5
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• pp.59-70
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• 2012

RSA-CRT is one of the commonly used techniques to speedup RSA operation. Since RSA-CRT performs its operations based on the modulus of two private primes, it is about four times faster than RSA. In RSA, the two primes are normally thrown away after generating the public key pair. However, in RSA-CRT, the two primes are directly used in RSA operations. This led to hardware fault attacks which can be used to factor the public modulus. The most common way to counter these attacks is based on error propagation. In these schemes, all the outputs of RSA are affected by the infected error which makes it difficult for an adversary to use the output to factor the public modulus. However, the error propagation has sequentialized the RSA operation. Moreover, these schemes have been found to be still vulnerable to hardware fault attacks. In this paper, we propose two new RSA-CRT schemes which are both resistant to hardware fault attack and support parallel execution: one uses common modulus and the other one perform operations in each prime modulus. Both proposed schemes takes about a time equal to two exponentiations to complete the RSA operation if parallel execution is fully used and can protect the two private primes from hardware fault attacks.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.5
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• pp.1089-1098
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• 2018

As the development of quantum computers becomes visible, the researches on post-quantum cryptography to alternate the present cryptography system have actively pursued. To substitute RSA and Elliptic Curve Cryptosystem, post-quantum cryptography must also consider side channel resistance in implementation. In this paper, we propose a side channel analysis on NTRU, based on the implementation made public in the NIST standardization. Unlike the previous analysis which exploits a thousands of traces, the proposed attack can recover the private key using a single power consumption trace. Our attack not only reduces the complexity of the attack but also gives more possibility to analyze a practical public key cryptosystem. Furthermore, we suggested the countermeasure against our attacks. Our countermeasure is much more efficient than existing implementation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.6
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• pp.736-743
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• 2020

Modular multiplication is one of the most important arithmetic operations in public-key cryptography such as elliptic curve cryptography (ECC) and RSA, and the performance of modular multiplier is a key factor influencing the performance of public-key cryptographic hardware. An efficient hardware implementation of word-based Montgomery modular multiplication algorithm is described in this paper. Our modular multiplier was designed to support eleven field sizes for prime field GF(p) and binary field GF(2k) as defined by SEC2 standard for ECC, making it suitable for lightweight hardware implementations of ECC processors. The proposed architecture employs pipeline scheme between the partial product generation and addition operation and the modular reduction operation to reduce the clock cycles required to compute modular multiplication by 50%. The hardware operation of our modular multiplier was demonstrated by FPGA verification. When synthesized with a 65-nm CMOS cell library, it was realized with 33,635 gate equivalents, and the maximum operating clock frequency was estimated at 147 MHz.