• Title/Summary/Keyword: RFID multi reader

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Implementation of Home Service Robot System consisting of Object Oriented Slave Robots (객체 지향적 슬레이브 로봇들로 구성된 홈서비스 로봇 시스템의 구현)

  • Ko, Chang-Gun;Ko, Dae-Gun;Kwan, Hye-Jin;Park, Jung-Il;Lee, Suk-Gyu
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.337-339
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    • 2007
  • This paper proposes a new paradigm for cooperation of multi-robot system for home service. For localization of each robot. the master robot collects information of location of each robot based on communication of RFID tag on the floor and RFID reader attached on the bottom of the robot. The Master robot communicates with slave robots via wireless LAN to check the motion of robots and command to them based on the information from slave robots. The operator may send command to slave robots based on the HRI(Human-Robot Interaction) screened on masted robot using information from slave robots. The cooperation of multiple robots will enhance the performance comparing with single robot.

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A Stack Bit-by-Bit Algorithm for RFID Multi-Tag Identification (RFID 다중 태그 인식을 위한 스택 Bit-By-Bit 알고리즘)

  • Lee, Jae-Ku;Yoo, Dae-Suk;Choi, Seung-Sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.8A
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    • pp.847-857
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    • 2007
  • For the implementation of a RFID system, an anti-collision algorithm is required to identify multiple tags within the range of a RFID Reader. A Bit-by-Bit algorithm is defined by Auto ID Class 0. In this paper, we propose a SBBB(Stack Bit-by-Bit) algorithm. The SBBB algorithm save the collision position and makes a query using the saved data. SBBB improve the efficiency of collision resolution. We show the performance of the SBBB algorithm by simulation. The performance of the proposed algorithm is higher than that of BBB algorithm. Especially, the more each tag bit streams are the duplicate, the higher performance is.

Design and Fabrication of Compressive Receiver for RFID Signal Detection (RFID 신호 탐지용 컴프레시브 수신기의 설계 및 제작)

  • Jo, Won-Sang;Park, Dong-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.3
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    • pp.321-330
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    • 2010
  • In this paper, the theoretical background and the specific implementation method of a compressive receiver for RFID signal detection as well as the design method of DDL(Dispersive Delay Line) and chirp LO are described. DDL, which is one of the main components of the compressive receiver, is designed to have $13{\mu}s$ dispersive delay time and 6 MHz bandwidth using the SAW technique based on $LiNbO_3$ material. The chirp LO is designed using DDS(Direct Digital Synthesizer). Also the compressive receiver is fabricated to be installed into the RFID reader. Test results show the maximum frequency error of 25 kHz for single signal input, the receiver sensitivity of -44 dBm, and the maximum frequency error is 75 kHz for 6 multi-tone input signals. These results indicate that the fabricated compressive receiver is working well even in dense RFID operating environments.

Passive RFID system for Efficient Area Coverage Algorithm (Passive RFID 시스템을 이용한 효율적인 영역 탐색 기법)

  • Lee, Sangyup;Lee, Choong-Yong;Jo, Wonse;Nam, Sang Yep;Kim, Dong-Han
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.2
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    • pp.220-226
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    • 2014
  • This paper proposes an enhanced fast scanning method for multi-agent robot system. Passive RFID tag can read and store the information within the range of recognizable RF tag reader. Based on this information of Passive RFID tag, the position of mobile robot can be estimated and at the same time, the efficiency of scanning process can be improved because it provides a scanning trace for other mobile robots. This paper proposes an dfficient motion planning algorithm for mobile robots in a smart floor environment.

Implementation & Verification of RFID Gen2 Protocol on FPGA Prototyping board (FPGA를 이용한 RFID Gen2 protocol의 구현 및 검증)

  • Je, Young-Dai;Kim, Jae-Lim;Jang, Il-Su;Yang, Hoon-Gee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.869-872
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    • 2008
  • This paper presents the VHDL implementation procedure of the passive RFID tag in Ultra High Frequency RFID system. The operation of the tag compatible with the EPCglobal Class1 Generation2(GEN2) protocol is verified by timing simulation after synthesis and implementation on prototyping board. Due to the reading range with relatively large distance, a passive tag needs digital processor which facilitates faster decoding, encoding and state transition for enhancement of the interrogation rate. Also with UART communication, verify a inventory Round in Gen2 Protocol. The verification results with the fastest data rate, 640kbps, and multi tags environment scenario show that the implemented tag spend 1.4ms transmitting the 96bits EPC to reader.

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On the Design of Multi-layered Polygonal Helix Antennas (다각 다단 구조 헬릭스 안테나 설계)

  • Choo Jae-Yul;Choo Ho-Sung;Park Ik-Mo;Oh Yi-Sok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.3 s.106
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    • pp.249-258
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    • 2006
  • In this letter, we propose a novel printed helix antenna for RFID reader in UHF band. The printed strip line of the antenna is first wound up outside a polygonal shaped layer and then the winding continues on an inner layer to control the overall gain and the radiation pattern. In addition, the winding pitch angles on each layer have either negative or positive values resulting in the broad CP bandwidth. The detail structure of the antenna was optimized using Pareto genetic algorithm(GA), so as to obtain excellent performances for RFID reader antennas. The optimized two-layered polygonal helix was fabricated on the cardboard of a flexible substrate and the performances were measured and compared with the simulations. The fabricated antenna was made up of copper tape which can adhere to a flexible cardboard and had 21.4 % matching bandwidth, 31.9 % CP bandwidth, readable range of $5.5m^2$ with kr=3.2. Also based on the current distribution of the strip line of the antenna and sensitivity of the antenna bents points, we confirmed that the antenna has the quarter-wave transformer near the feed for the broad matching bandwidth and radiates the traveling wave for the broad CP bandwidth using the bent strip line.

Design of Dual-Band Power Amplifier for the RFID Frequency-Band (RFID 대역에서 동작하는 이중 대역 전력증폭기 설계)

  • Kim, Jae-Hyun;Hwang, Sun-Gook;Park, Hyo-Dal
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.3
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    • pp.376-379
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    • 2014
  • In this paper, we designed more improving a dual-band power amplifier than the transceiver of RFID reader that operates at 910 MHz and 2.45 GHz. A dual-band power amplifier has two circuits. One matching circuit is composed lumped element in the band of 910 MHz. The other matching circuit using distributed element in the high band of 2.45 GHz. So, this dual-band power amplifier works as Band Rejection Filter in the band of 910 MHz but in the high band of 2.45 GHz works as Band Pass Filter. Therefore, this is composed a microstrip transmission line. A power amplifier is showed gains of 8 dB output power at 910 MHz and 1.5 dB output power at 2.45 GHz. If input power is 10 dBm, both of bands output 20 dBm.

VHDL Implementation of GEN2 Protocol for UHF RFID Tag (RFID GEN2 태그 표준의 VHDL 설계)

  • Jang, Il-Su;Yang, Hoon-Gee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.12A
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    • pp.1311-1319
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    • 2007
  • This paper presents the VHDL implementation procedure of the passive RFID tag operating in Ultra High Frequency. The operation of the tag compatible with the EPCglobal Class1 Generation2(GEN2) protocol is verified by timing simulation after synthesis and implementation. Due to the reading range with relatively large distance, a passive tag needs digital processor which facilitates faster decoding, encoding and state transition for enhancement of an interrogation rate. In order to satisfy linking time, the pipe-line structure is used, which can minimize latency to serial input data stream. We also propose the sampling strategy to decode the Preamble, the Frame-sync and PIE symbols in reader commands. The simulation results with the fastest data rate and multi tags environment scenario show that the VHDL implemented tag performs faster operation than GEN2 proposed.

Implementation of Multimodal Biometric Embedded System (다중 바이오 인식을 위한 임베디드 시스템 구현)

  • Kim, Ki-Hyun;Yoo, Jang-Hee
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.875-876
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    • 2006
  • In this paper, we propose a multimodal biometric embedded system. It is designed to support face, iris, fingerprint and vascular pattern recognition. We use a S3C2440A based on ARM926T core processor that is made in Samsung. The system has support various external device interfaces for multi biometric sensors, and RFID/Smart Card reader/writer. Additionally, it has a 6" LCD panel and numeric keypad for easy GUI. The embedded system offers useful environments to develop better biometric algorithms for stand alone biometric system and accelerator hardware modules for real time operation.

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