• Journal of IKEEE
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• v.19 no.3
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• pp.371-377
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• 2015

This paper is about the RF transceiver designed and implementation for common data link. The trasmitter is configured as a frequency up-converter, a power amplifier and a duplexer. The receiver is configured as a duplxer, a frequency down-converter and a low noise amplifier. The maximum transmission distance, the reception sensitivity is designed to meet the electrical and temperature characteristics and the like. Using a modeling and simulation in order to meet the requirements of the RF transceiver has been designed and implemented. Transmitting output power and Noise Figure has been measured with 38.58dBm and 5.5dB, respectively. All of the electrical and temperature specifications was meet. Was confirmed all of the requirement specification by electrical characteristics test and temperature characteristics test.

• Proceedings of the Korean Vacuum Society Conference
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• 2006.08a
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• pp.127-127
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• 2006

• Journal of IKEEE
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• v.3 no.2 s.5
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• pp.186-195
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• 1999

In this paper, the RF-modules composed of front-end, frequency synthesizer, modulator/demodulator and power control multi channel WLL personal system for W-CDMA using 10 [MHz] RF channel bandwidth has been implemented and considered. The measured transmission power is 250 [mW] which is very close to the required value. The measured flatness of power at the final output stage is ${\pm}1.5[dB]$ over the required bandwidth of the receiver. In addition, it is found that the chip rate transmitting spread signal is set to 8.192 [MHz], the required rate. The frequencies of RF_LO signal and LO signal of the modulator and the demodulator measured by a frequency synthesizer are satisfied with design requirements. The operating range of the receiving strength signal indicator and AGC units shows 60 [dB] respectively. Also the measured phasor diagram and eye pattern for deciding the RF modules compatible with baseband digital signal processing part are shown good results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.98-101
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• 2007

A fully integrated 5-GHz CMOS power amplifier for IEEE 802.11a WLAN applications is implemented using $0.18-{\mu}m$ CMOS technology. An on-chip transmission-line transformer is used for output matching network and voltage combining. Input balun, inter-stage matching components, output transmission line transformer and RF chokes are fully integrated in the designed amplifier so that no external components are required. The power amplifier occupies a total area of $1.7mm{\times}1.2mm$. At a 3.3-V supply voltage, the amplifier exhibits a 22.6-dBm output 1-dB compression point, 23.8-dBm saturated output power, 25-dB power gain. The measured power added efficiency (PAE) is 20.1 % at max. peak, 18.8% at P1dB. When 54 Mbps/64 QAM OFDM signal is applied, the PA delivers 12dBm of average power at the EVM of -25dB.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.9
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• pp.19-27
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• 1998

The Transmitter part of single RF transceiver chip for an extended GSM handset application was circuit-designed, fabricated adn evaluated. The RF-IC Chip was processed by 0.8${\mu}m$ Si BiCMOS, 80 pin TQFP of $10 {\times} 10mm$ size, 3.3V operated RF-IC reveals, in general, quite reasonable integrity and RF performances. This paper describes development resuts of RF transmitter section, which includes IF/RF up-conversion mixer, IF/RF polyphase and pre-amplifier. The test results show that RF transmitter section is well operated within frequency range of 880~915MHz, which is defined on the extended GSM(E-GSM) specification. The transmitter section also reveals moderate power consumption of 71mA and total output power of 8.2dBm.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2003.05a
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• pp.92-96
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• 2003

In this paper, 30 W power Amplifier for IMT-2000 repeater was developed gain flatness and the third IMD (Intermodulation distortion) by Microwave absorber. The absorption ability of the absorber is measured up to -10 ㏈ and -4 ㏈ at 3.6 ㎓, 2.3 ㎓ band respectively. Non using absorber power amplifier has the gain over 57 ㏈, the gain flatness of ${\pm}$0.33 ㏈ and the third IMD of 27 ㏈c at 33.3 W output. Otherwise, using absorber power amplifier has the gain over 58㏈, the gain flatness of less than ${\pm}$0.9, the third IMD over 29 ㏈c at the same output power. As a result, the characteristic of the different type show improvement of 1 ㏈ in gain, 0.3 ㏈ in Gain flatness and 1.77 ㏈c in IMD.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.2
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• pp.99-108
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• 2018

This paper presents a design study of a solid state power oscillator to replace the conventional magnetron. The operational conditions of a single-stage 300 W LDMOS power amplifier were fully characterized. The power module consisted of two amplifiers connected in parallel. A delay-line feedback loop was designed for self-oscillation. A phase shifter was inserted in the delay-line feedback loop for adjusting the round-trip phase. Experiments performed using the power oscillator showed an output power of 800 W and a DC-RF conversion efficiency of 58 % at 2.327 GHz. The measured results were in good agreement with those predicted by numerical simulations.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.136-141
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• 1995

GaAs power MESFETs with 1 .mu.m gate length and an undoped GaAs surface layer on the doped GaAs channel are fabricated using IR(image reversal) and air-birdge processes. And then We have measured and calculated DC and RF characteristics. We have obtained saturation current 107-500 mA (197-255 mA/mm), maximum linear RF output power 111-518.8 mW (204-270 mW/mm), current gain cut-off frequency 7-10 GHz, maximum unilateral transducer power gain 5.7-12.7, and power added efficiencies 37.9-41.2 % from the devices with gate width 0.45-2.2 mm, at 6 GHz.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.113-117
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• 2003

This paper describes the design and the simulation results of the RF CMOS Class-E Power Amplifier for a 2.4GHz ISM band. This circuit is composed two connected amplifiers. where Class F amplifier drives Class E amplifier. The proposed circuit can reduce the total power dissipation of the driving stage and can work with higher efficiency. The power amplifier has been implemented in a standard $0.25{\mu}m$ CMOS technology and is shown to deliver 100mW output power to load with 41% power added efficiency(PAE) from a 2.5V supply.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.335-339
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• 2003

This Paper describes the design and the simulation results of the RF CMOS Class-E Power Amplifier for a 2.4GHz ISM band. This circuit is composed two connected amplifiers. where Class F amplifier drives Class E amplifier. The proposed circuit can reduce the total power dissipation of the driving stage and can work with higher efficiency. The power amplifier has been implemented in a standard 0.25$\mu\textrm{m}$ CMOS technology and is shown to deliver 100mW output Power to load with 41％ power added efficiency(PAE) from a 2.5V supply.