• Title/Summary/Keyword: RF Oscillator

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A New Binary Frequency Shift Keying Technique Using Cellular Oscillator Networks (셀 룰라 발진기 네트웍을 이용한 새로운 2진 주파수 편이 변조 기법)

  • Won, Eun-Ju;Kang, Sung-Mook;Choi, Jong-Ho;Moon, Gyu
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.258-261
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    • 2000
  • In this paper, the design of Binary FSK Using Cellular Oscillator Network architecture is newly introduced and analyzed. With its easy frequency controllability and MHz range of quadrature signals, the Cellular Oscillator Network can be used in RF communication systems. Binary Frequency Shift Keying can also be implemented through digital loop-path switching. This FSK model is simulated and proved with typical 3V, 0.5$\mu\textrm{m}$ CMOS N-well process parameters.

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A Novel High Speed Frequency Sweeping Signal Generator in X-band Based on Tunable Optoelectronic Oscillator

  • Sun, Mingming;Chen, Han;Sun, Xiaohan
    • Current Optics and Photonics
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    • v.2 no.1
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    • pp.53-58
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    • 2018
  • A novel X-band high speed frequency sweep signal generator based on a tunable optoelectronic oscillator (OEO) incorporating a frequency-swept laser is presented and the theoretical fundamentals of the design are explained. A prototype of the generator with tuning range from 8.8552 GHz to 10.3992 GHz and a fine step about 8 MHz is achieved. The generated radiofrequency signal with a single sideband (SSB) phase noise lower than -100 dBc/Hz@10KHz is experimentally demonstrated within the whole tunable range, without any narrow RF band-pass filters in the loop. And the tuning speed of the frequency sweep signal generator can reach to over 1 GHz/s benefiting from applying a novel dispersion compensation modular instead of several tens of kilometers of optical fiber delay line in the system.

Planar Active Rectrodirective Array With Subharmonic Phase Conjugation Mixers

  • Kim Gi-Rae;Park Ji-Yong
    • Journal of information and communication convergence engineering
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    • v.2 no.3
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    • pp.153-156
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    • 2004
  • A planar active retrodirective four-element array with subharmonic phase conjugation mixers based on anti-parallel diode pairs (APDPs) is proposed. As compared to previous phase conjugation mixers using twice RF frequency for LO frequency, the proposed conjugation mixers need only half RF frequency so that it can be easily applied for millimeter-wave applications. Receiving, transmitting, local oscillator, and intermediate frequencies are 5.79, 5.81, 2.9 GHz, and 10 MHz. Monostatic RCS and Bistatic RCS measurements at source locations of $0^{\circ},\;-20^{\circ},\;and\;28^{\circ}$ show good agreement with the calculated data.

A D-Band Integrated Signal Source Based on SiGe 0.18μm BiCMOS Technology

  • Jung, Seungyoon;Yun, Jongwon;Rieh, Jae-Sung
    • Journal of electromagnetic engineering and science
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    • v.15 no.4
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    • pp.232-238
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    • 2015
  • This work describes the development of a D-band (110-170 GHz) signal source based on a SiGe BiCMOS technology. This D-band signal source consists of a V-band (50-75 GHz) oscillator, a V-band amplifier, and a D-band frequency doubler. The V-band signal from the oscillator is amplified for power boost, and then the frequency is doubled for D-band signal generation. The V-band oscillator showed an output power of 2.7 dBm at 67.3 GHz. Including a buffer stage, it had a DC power consumption of 145 mW. The peak gain of the V-band amplifier was 10.9 dB, which was achieved at 64.0 GHz and consumed 110 mW of DC power. The active frequency doubler consumed 60 mW for D-band signal generation. The integrated D-band source exhibited a measured output oscillation frequency of 133.2 GHz with an output power of 3.1 dBm and a phase noise of -107.2 dBc/Hz at 10 MHz offset. The chip size is $900{\times}1,890{\mu}m^2$, including RF and DC pads.

Two-Stage Ring Oscillator using Phase-Look-Ahead Mehtod and Its Application to High Speed Divider-by-Two Circuit (진상 위상 기법을 이용한 2단 링 구조 발진기 및 고속 나누기 2 회로의 고찰)

  • Hwang, Jong-Tae;Woo, Sung-Hun;Hwang, Myung-Woon;Ryu, Ji-Youl;Cho, Gyu-Hyeong
    • Proceedings of the KIEE Conference
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    • 1999.07g
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    • pp.3181-3183
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    • 1999
  • A CMOS two-stage oscillator applicable to requiring in- and quadrature-phase components such as RF and data retiming applications are presented using phase-look-ahead technique. This paper clearly describes the operation principle of the presented two-stage oscillator and the principle can be also applicable to the high speed high speed divide-by-two is usually used for prescaler of the frequency synthesizer. Also, the sucessful oscillation of the proposed oscillator using PLA is confirmed through the experiment. The test vehicle is designed using 0.8 ${\mu}m$ N-well CMOS process and it has a maximum 914MHz oscillation showing -75dBclHz phase noise at 100kHz offset with single 2V supply.

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DPLL System Development using 100GHz Band Gunn VCO (100GHz 대역 Gunn VCO를 이용한 DPLL 시스템 개발연구)

  • Lee, Chang-Hoon;Kim, K.D.;Chung, M.H.;Kim, H.R.
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.11 s.353
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    • pp.210-215
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    • 2006
  • In this paper, we develop the PLL system of the local oscillator system using Gunn oscillator VCO for millimeter wave band receiving system. The local oscillator system consists of the $86{\sim}115GHz$ Gunn. diode oscillator part, the RF processing part including the diplexer and the harmonic mixer, and the DPLL system including Gunn modulator and controller. Based on this configuration, we verify the frequency and power stability of the developed local oscillator system. We developed system which applied to DPLL technique instead of the existing analog PLL method to accomplish this purpose. The developed system for this purpose is tested the frequency and power stability for a long time to confirm performance. Since we confirmed this system that had frequency characteristic of within ${\pm}10Hz$, very fine output drift power characteristic of $0.2{\sim}0.3dBm$ and about 200MHz locking range, it verified suitable for cosmic radio receiving system through the test result.

A 950 MHz CMOS RF frequency synthesizer for CDMA wireless transceivers (CDMA 이동 통신 단말기용 950 MHz CMOS RF 주파수 합성기)

  • 김보은;김수원
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.7
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    • pp.18-27
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    • 1997
  • A CMOS 950 MHz frequency synthesizer is designed and fabricated in a 0.8.mu.m standard CMOS process for IS-95-A CDMA mobile communication transceivers To utilize a CMOS ring VCO in a CDMA wireless communication receisver, we employed a QDC (quasi-direct conversion) receiver architecture for CDMA applications. Realized RF frequency synthesizer used as the RF local oscillator for a QDC receiver exhibits a phase noise of -92 dBc/Hz at 885kHz offset from the 950.4 MHz carrier, which complies with IS-95-A CDMA specification. It has a rms jitter of 23.7 ps, and draws 30mA from a 5V supply. Measured I/Q phase error of the 950.4 output signals is 0.7 degree.

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960MHz band multi-layer VCO design (960MHz 대역 다층구조 VCO 설계)

  • Rhie, Dong-Hee;Jung, Jin-Hwee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11b
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    • pp.410-413
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    • 2001
  • In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont #9599, which is applied for L TCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of l0[mA]

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960MHz band multi-layer VCO design (960MHz대역 다층구조 VCO 설계)

  • 이동희;정진휘
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.410-413
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    • 2001
  • In this paper, we present results of this that design of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonation circuit and the oscillation circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for acquiring EM(Electromagnetic) characteristics of conductor pattern as well as designing multi-layer VCO, Acquired EM characteristics of the circuit pattern was used like real components at nonlinear RF circuit simulator. Finally VCO is simulated at nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont #9599, which is applied for LTCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 1[dBm], the phase noise was 102 [dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of 10[mA].

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470-MHz-698-MHz IEEE 802.15.4m Compliant RF CMOS Transceiver

  • Seo, Youngho;Lee, Seungsik;Kim, Changwan
    • ETRI Journal
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    • v.40 no.2
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    • pp.167-179
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    • 2018
  • This paper proposes an IEEE 802.15.4m compliant TV white-space orthogonal frequency-division multiplexing (TVWS)-(OFDM) radio frequency (RF) transceiver that can be adopted in advanced metering infrastructures, universal remote controllers, smart factories, consumer electronics, and other areas. The proposed TVWS-OFDM RF transceiver consists of a receiver, a transmitter, a 25% duty-cycle local oscillator generator, and a delta-sigma fractional-N phase-locked loop. In the TV band from 470 MHz to 698 MHz, the highly linear RF transmitter protects the occupied TV signals, and the high-Q filtering RF receiver is tolerable to in-band interferers as strong as -20 dBm at a 3-MHz offset. The proposed TVWS-OFDM RF transceiver is fabricated using a $0.13-{\mu}m$ CMOS process, and consumes 47 mA in the Tx mode and 35 mA in the Rx mode. The fabricated chip shows a Tx average power of 0 dBm with an error-vector-magnitude of < 3%, and a sensitivity level of -103 dBm with a packet-error-rate of < 3%. Using the implemented TVWS-OFDM modules, a public demonstration of electricity metering was successfully carried out.