• 한국ITS학회:학술대회논문집
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• v.2006 no.10
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• pp.304-307
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• 2006

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.995-998
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• 2005

This paper proposes a new SoC (System-on-Chip)-based automatic compensation circuit (ACC) for 5GHz low noise amplifier (LNA). This circuit is extremely useful for today's RF IC (Radio Frequency Integrated Circuit) devices in a complete RF transceiver environment. The circuit contains RF BIST (Built-ln Self-Test) circuit, Capacitor Mirror Banks (CMB) and digital processing unit (DPU). The ACC automatically adjusts performance of 5GHz LNA by the processor in the SoC transceiver when the LNA goes out of the normal range of operation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.2
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• pp.299-308
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• 2008

This paper proposes a new design specification-based band fault modelling technique that can test design specification in a time domain. The band fault model is defined and the conditions of band fault model are gained as normal operation regions are defined. And the conditions of band fault model are used in a 5.25GHz low noise amplifier, then 9 band fault models that can detect hard and parametric faults of active and passive devices are obtained.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.6
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• pp.900-909
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• 1999

The receiving part of the RF system for the digital TRS base stations is developed in this paper. Based on the system specifications, the structure of the RF system is accomplished and its block diagram is drawn. The RF system is implemented according to these block diagrams. Subsequently the RF band-pass filter, the low noise amplifier, the automatic level controlled attenuator, the frequency synthesizer and other components for the system are designed and implemented, and a main board to integrate these modules is also manufactured. To lower the noise floor of the system and suppress the RF spurious noise, a PCB layout is performed carefully. For each module consisting of the RF system and the entire system, the performance tests are accomplished to check the specifications.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.8 no.1
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• pp.12-17
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• 2009

In this paper, We play it for the purpose of study about the power amplifier which applied DGS and adaptive bias circuit structure to general Doherty amplifier for the efficiency of a RF power amplifier and a linearity improvement in the WiBro band. As for the IMD3, 3.4dBc was improved with -26.3dBc when we did the measurement result existing Doherty power amplifier and comparison of the Doherty power amplifier which applied an adaptive bias circuit and the DGS which proposed in this paper, and the mean power efficiency verified what was increased in 37%. Also, we were able to know PAE of 36.6% with output power 34.0dBm in P1dB when magnitude of an input signal was 25.6dBm. we did 6dB back off in output P1dB in order to confirm the ACPR which was a nonlinear characteristic and measured the ACPR. we showed the -34.55dBc which was a value of -34.5dBc or below in the 4.77MHz off-set that was a transmission standard. Therefore, we were able to know that we were satisfied with a spectrum mask standard.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.98-101
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• 2007

A fully integrated 5-GHz CMOS power amplifier for IEEE 802.11a WLAN applications is implemented using $0.18-{\mu}m$ CMOS technology. An on-chip transmission-line transformer is used for output matching network and voltage combining. Input balun, inter-stage matching components, output transmission line transformer and RF chokes are fully integrated in the designed amplifier so that no external components are required. The power amplifier occupies a total area of $1.7mm{\times}1.2mm$. At a 3.3-V supply voltage, the amplifier exhibits a 22.6-dBm output 1-dB compression point, 23.8-dBm saturated output power, 25-dB power gain. The measured power added efficiency (PAE) is 20.1 % at max. peak, 18.8% at P1dB. When 54 Mbps/64 QAM OFDM signal is applied, the PA delivers 12dBm of average power at the EVM of -25dB.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.813-816
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• 1999

본 논문에서는 KOMPSAT에 사용할 S-band 위성중계기 (RF transponder)에 사용되는 Power Amplifier에 대한 설계와 제작에 대하여 논하고자 한다. 또한 이 설계에 대한 검증을 수행하기 위하여 impact analysis 와 기본적인 이론을 정리 한 후 모의 설계를 통해 설계 가능성을 검토하였다. 현재 당사가 개발 추진중인 다목적 실용 위성 ( KOMPSAT) 에 이용될 S-band Transponder 의 주파수는 uplink 2099.5㎒ 와 downlink 2280㎒를 근간으로 설계하였으며, 회로 시뮬레이션을 위해 사용된 software는 ADS(advanced Design System : HP) 및 ISSPICE 4 E.2 이며, Monte Carlo Analysis funtion 을 이용하여 대수학적으로 전개하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.12
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• pp.1060-1068
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• 2011

In this paper, Current-Mode Class-D(CMCD) RF Power Amplifier(PA) is designed and implemented at 900 MHz. Conventional CMCD PA has output parallel resonator to reconstruct a fundamental frequency component of the output signal. However the resonator can be removed by connecting inverse class-F PAs because even-harmonic components can be removed by CMCD PA's push-pull structure. Using load-pull, inverse class-F PA with GaN transistors is designed, and CMCD PA with the inverse class-F PA is implemented. The CMCD PA has 64.5 % drain efficiency, 34.2 dBm output power. Comparing with the drain efficiency of a CMCD PA with parallel resonator, the CMCD with the inverse class-F technology has 13.6 % improved drain efficiency.

• ETRI Journal
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• v.42 no.5
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• pp.781-789
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• 2020

In this study, an E-band low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) has been designed using silicon-germanium 130-nm bipolar complementary metal-oxide-semiconductor technology to suppress unwanted signal gain outside operating frequencies and improve the signal gain and noise figures at operating frequencies. The proposed impedance-controllable filter has series (R_s) and parallel (R_p) resistors instead of a conventional inductor-capacitor (L-C) filter without any resistor in an interstage matching circuit. Using the impedance-controllable filter instead of the conventional L-C filter, the unwanted high signal gains of the designed E-band LNA at frequencies of 54 GHz to 57 GHz are suppressed by 8 dB to 12 dB from 24 dB to 26 dB to 12 dB to 18 dB. The small-signal gain S₂₁ at the operating frequencies of 70 GHz to 95 GHz are only decreased by 1.4 dB to 2.4 dB from 21.6 dB to 25.4 dB to 19.2 dB to 24.0 dB. The fabricated E-band LNA MMIC with the proposed filter has a measured S₂₁ of 16 dB to 21 dB, input matching (S₁₁) of -14 dB to -5 dB, and output matching (S₂₂) of -19 dB to -4 dB at E-band operating frequencies of 70 GHz to 95 GHz.

• Journal of Digital Contents Society
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• v.13 no.4
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• pp.491-500
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• 2012

In this paper, a new loopback BIST structure which is effective to test RF transceiver chip and LNA(Low Noise Amplifier) in the chip is presented. Because the presented BIST structure uses a baseband processor in the chip as a tester while the system is under testing mode, the developed test technique has an advantage of performing test application and test evaluation in effectiveness. The presented BIST structure can change high frequency test output signals to a low frequency signals which can make the CUT(circuits under test) tested easily. By using this technique, the necessity of RF test equipment can be mostly reduced. The test time and test cost of RF circuits can be cut down by using proposed BIST structure, and finally the total chip manufacturing costs can be reduced.