• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.44 no.3
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• pp.212-217
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• 2016

The S-band receiver for Low Earth Orbit satellite is designed and fabricated as engineering model. Demodulator is implemented by using FPGA for extension of demodulator method. The receiver consists of RF Block, Digital demodulator and Power stage and has a Doppler tracking function to compensate a frequency shift that occur on the operation. The measured results of fabricated receiver show BER of less than $1.0{\times}10^{-6}$ at -110dBm RF input power and equipped a frequency tracking of ${\pm}100KHz$ relative to the center frequency. TID test was satisfied with the results of the test criterion is 10krad.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.4
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• pp.277-284
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• 1988

A 12GHz low-noise amplifier, a single gate GaAs MESFET mixer, and a low-pass filter have been fabricated for DBS receiver applications by using MIC technology. Each subsystem contains DC block with symmetric line and ship capacitor, respectively. The frequency converter with chip capacitor exhibits a 20-23 dB conversin gain with a RF bandwidth of 11.581-11.981 GHz and an IF bandwidth of 581-981MHz. Rf bandwidth of 12.1GHz and an IF banewidth of 1GHz.

• 한국정보통신설비학회:학술대회논문집
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• 2005.08a
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• pp.422-426
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• 2005

초고속통신, 고 정밀 위치정보 시스템 등을 구현하기 위해 광 대역 특성을 요구하는 UWB(Ultra Wideband) 시스템에 대한 연구가 활발히 진행되고 있다. 본 논문에서는 DS-CDMA(Direct Sequence - Code Division Multiple Access)를 근간으로 하는 3 GHz $\sim$ 5GHz의 주파수 대역을 갖는 UWB 시스템에서 아날로그 QPSK(Quadrature Phase Shift Keying) 변복조, 주파수 변환 및 전력 증폭 기능을 수행하는 RF 트랜시버 설계 방안을 제시하였고, 광 대역 특성을 만족하는 주요 구성 성분들의 설계 방법 및 성능 특성을 분석하였다. 상용 부품 및 제작된 부품 들을 이용하여 구현된 RF 트랜시버에 대한 성능평가를 통해 DS-CDMA 방식의 UWB 시스템을 위한 RF 트랜시버 설계 및 구현 접근 방법을 검증하였다.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.57-63
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• 2016

This paper describes implementation of the RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4g SUN sensor node transceiver modules. Design of the each module like VCO, prescaler, 1/N divider, ${\Delta}-{\Sigma}$ modulator, and common circuits of the PLL has been optimized to obtain high speed and low noise performance. Especially, the VCO has been designed with NP core structure and 13 steps cap-bank to get high speed, low noise, and wide band tuning range. The output frequencies of the implemented synthesizer is 1483MHz~2017MHz, the phase noise of the synthesizer is -98.63dBc/Hz at 100KHz offset and -122.05dBc/Hz at 1MHz offset.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.11a
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• pp.161-166
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• 1999

The global trends of mobile communication system is moving toward digitizing, high-speed and large-capacity. Also, to utilize the limited frequency-resource efficiently, spread spectrum system is a mainstream. In this study we are concerning with the fast frequency-hopping system. Instead of the PLL with many problems such as phase-noise, we used the DDS is popular in these days minimizes the disadvantage of PLL. In the case the FFH system is designed using the PLL, it is difficult to be satisfied of the design conditions such as RF badwidth and the settling time of PLL, and it has limitation because of complex circuit by using the balanced modulator. In this study, we evaluated the performance in order to design the FFH system using the DDS. The system that has the improvement of error rate, 1Mhps hopping rate and 5MHz RF bandwidth is designed and evaluated.

• Journal of the Korean Vacuum Society
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• v.8 no.1
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• pp.75-82
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• 1999

Ion energy is one of the crucial property in thin film deposition by internal ICP assisted I-PVD. As ion energy is determined by the difference between the plasma potential and the substrate bias potential, ICP excitation frequency was tested with medium frequency of 4 MHz and two types of tuning circuits, alternate and floating LC network with a biasing resistor, were tested. The results showed that plasma potential was less than 5 V in a range of Ar pressures, 5mTorr to 30 mTorr, at 4 MHz RF 600 W and 60 V of maximum RF antenna voltage was maintained either at RF input or output terminal. By proper control of RLC circuit installed after after RF antenna, 50V of RF induced voltage on RF antenna was obtained at 500W input power. The total impedance of RF antenna and plasma was around 10$\Omega$, and minimum RF voltage was obtained with a condition of lowest reactance at most 0.05$\Omega$.

• Journal of IKEEE
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• v.11 no.4
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• pp.145-151
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• 2007

In this work, small-size, high-performance solenoid-type RF chip inductors utilizing a low-loss ${Al_2}{O_3}$ core material were investigated. The size of the chip inductors fabricated in this work were $0.86{\times}0.46{\times}0.45m^3$, $1.5{\times}1.0{\times}0.7m^3$, $2.1{\times}1.5{\times}1.0m^3$, and $2.4{\times}2.0{\times}1.4m^3$ and copper (Cu) wire with $27{\sim}40{\mu}m$ diameter was used as the coils. High frequency characteristics of the inductance, quality factor, and impedance of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). It was observed that the developed inductors with the number of turns of 7 have the inductance of 13 to 100nH and exhibit the self-resonant frequency (SRF) of 6.4 to 1.1GHz. The SRF of inductors decreases with increasing the inductance and the inductors have the quality factor of 50 to 80 in the frequency range of 300MHz to 1.3GHz. In this study, small-size solenoid-type RF chip inductors with high inductance and high quality factor were fabricated successfully.

• Journal of the Korean Vacuum Society
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• v.19 no.2
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• pp.114-120
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• 2010

Conventional surface texturing in crystalline silicon solar cell have been use wet texturing by Alkali or Acid solution. But conventional wet texturing has the serious issue of wafer breakage by large consumption of wafer in wet solution and can not obtain the reflectance below 10% in multi crystalline silicon. Therefore it is focusing on RIE texturing, one method of dry etching. We developed large scale plasma RIE (Reactive Ion Etching) equipment which can accommodate 144 wafers (125 mm) in tray in order to provide surface texturing on the silicon wafer surface. Reflectance was controllable from 3% to 20% in crystalline silicon depending on the texture shape and height. We have achieved excellent reflectance below 4% on the weighted average (300~1,100 nm) in multi crystalline silicon using plasma texturing with gas mixture ratio such as $SF_6$, $Cl_2$, and $O_2$. The texture shape and height on the silicon wafer surface have an effect on gas chemistry, etching time, RF frequency, and so on. Excellent conversion efficiency of 16.1% is obtained in multi crystalline silicon by RIE process. In order to know the influence of RF frequency with 2 MHz and 13.56 MHz, texturing shape and conversion efficiency are compared and discussed mutually using RIE technology.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2010.05a
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• pp.562-563
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• 2010

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2163-2170
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• 2012

A signal receiving system can measure and analyze frequency, pulse modulation, scan modulation, frequency modulation on pulse, phase modulation on pulse of RF signal. A signal receiving system should be verified under simulated RF signal environment prior to verification on operation in fields. This paper describes an effective method to generate simulated RF signals with considering operational scenario. The simulated RF signal generator can be effectively used to evaluate the performance of the signal receiver and reduce the test cost of the signal receiver.