• Title/Summary/Keyword: Quantum Circuit

Search Result 172, Processing Time 0.026 seconds

Light-emitting Diodes based on a Densely Packed QD Film Deposited by the Langmuir-Blodgett Technique (랭뮤어-블롯젯을 통해 형성된 고밀도 양자점 박막과 이를 기반으로 한 발광다이오드)

  • Rhee, Seunghyun;Jeong, Byeong Guk;Roh, Jeongkyun
    • Journal of Sensor Science and Technology
    • /
    • v.31 no.4
    • /
    • pp.249-254
    • /
    • 2022
  • To achieve high-performance colloidal quantum dot light-emitting diodes (QD-LEDs), the use of a densely packed QD film is crucial to prevent the formation of leakage current pathways and increase in interface resistance. Spin coating is the most common method to deposit QDs; however, this method often produces pinholes that can act as short-circuit paths within devices. Since state-of-the-art QD-LEDs typically employ mono- or bi-layer QDs as an emissive layer because of their low conductivities, the use of a densely packed and pinhole-free QD film is essential. Herein, we introduce the Langmuir-Blodgett (LB) technique as a deposition method for the fabricate densely packed QD films in QD-LEDs. The LB technique successfully transfers a highly dense monolayer of QDs onto the substrate, and multilayer deposition is performed by repeating the transfer process. To validate the comparability of the LB technique with the standard QD-LED fabrication process, we fabricate and compare the performance of LB-based QD-LEDs to that of the spin-coating-based device. Owing to the non-destructiveness of the LB technique, the electroluminescence efficiency of the LB-based QD-LEDs is similar to that of the standard spin coating-based device. Thus, the LB technique is promising for use in optoelectronic applications.

Deadbeat Controller Design of a ZCS-type Power Factor Correction Circuit(QBSRR) (ZCS형 역률 개선 회로(QBSRR)의 데드빗(deadbeat)제어기 설계)

  • 최현칠
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.3 no.2
    • /
    • pp.107-117
    • /
    • 1998
  • In this paper, a deadbeat controller design technique is developed for the recently introduced PFC(Power Factor Correction) circuit named as a QBSRR(Quantum Boost Series Resonant Rectifier) to achieve the fast dynamic responses of the output voltage in the presense of any load variations. And, in order to monitor the load information without employing the current sensor, the load estimation method is also derived. By using the information of the load estimation method, the proposed controller gain is automatically adjusted to have the system always keep the very fast dynamic responses. To verify these superior performances, the simulation and the experiment are carried out.

Design and Measurement of an SFQ OR gate composed of a D Flip-Flop and a Confluence Buffer (D Flip-Flop과 Confluence Buffer로 구성된 단자속 양자 OR gate의 설계와 측정)

  • 정구락;박종혁;임해용;장영록;강준희;한택상
    • Progress in Superconductivity
    • /
    • v.4 no.2
    • /
    • pp.127-131
    • /
    • 2003
  • We have designed and measured an SFQ(Single Flux Quantum) OR gate for a superconducting ALU (Arithmetic Logic Unit). To optimize the circuit, we used WRspice, XIC and Lmeter for simulations and layouts. The OR gate was consisted of a Confluence Buffer and a D Flip-Flop. When a pulse enters into the OR gate, the pulse does not propagate to the other input port because of the Confluence Buffer. A role of D Flip-Flip is expelling the data when the clock is entered into D Flip-Flop. For the measurement of the OR gate operation, we attached three DC/SFQs, three SFQ/DCs and one RS Flip -Flop to the OR gate. DC/SFQ circuits were used to generate the data pulses and clock pulses. Input frequency of 10kHz and 1MHzwere used to generate the SFQ pulses from DC/SFQ circuits. Output data from OR gate moved to RS flip -Flop to display the output on the oscilloscope. We obtained bias margins of the D Flip -Flop and the Confluence Buffer from the measurements. The measured bias margins $\pm$38.6% and $\pm$23.2% for D Flip-Flop and Confluence Buffer, respectively The circuit was measured at the liquid helium temperature.

  • PDF

Bit Error Rate measurement of an RSFQ switch by using an automatic error counter (자동 Error counter를 이용한 RSFQ switch 소자의 Bit Error Rate 측정)

  • Kim Se Hoon;Kim Jin Young;Baek Seung Hun;Jung Ku Rak;Hahn Taek Sang;Kang Joon Hee
    • Progress in Superconductivity and Cryogenics
    • /
    • v.7 no.1
    • /
    • pp.21-24
    • /
    • 2005
  • The problem of fluctuation-induced digital errors in a rapid single flux quantum (RSFQ) circuit has been very important issue. So in this experiment, we calculated error rate of RSFQ switch in superconductiyity ALU, The RSFQ switch should have a very low error rate in the optimal bias. We prepared two circuits Placed in parallel. One was a 10 Josephson transmission lines (JTLs) connected in series, and the other was the same circuit but with an RSFQ switch placed in the middle of the 10 JTLs. We used a splitter to feed the same input signal to the both circuits. The outputs of the two circuits were compared with an RSFQ XOR to measure the error rate of the RSFQ switch. By using a computerized bit error rate test setup, we measured the bit error rate of 2.18$\times$$10^{12}$ when the bias to the RSFQ switch was 0.398mh that was quite off from the optimum bias of 0.6mA.

A Three-layered Optical Waveguide of Second-order Orbital Angular Momentum Mode Guiding for Photonic Integrated Circuit (3층 구조를 가지는 광 집적회로용 2차 궤도 각운동량 광 도파로)

  • Lee, In-Joon;Kim, Sang-In
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.14 no.4
    • /
    • pp.645-650
    • /
    • 2019
  • In this paper, a specifically designed waveguide structure that can carry first, and second-order orbital angular momentum(: OAM) mode is proposed. The proposed optical waveguide consists of three Si stripes embedded in $SiO_2$, which is suitable for implementing on-chip integration and fabrication by standard thin film deposition and etching processes. The second-order OAM mode was generated by combining two eigenmodes, which are calculated by finite difference method(: FDM). The topological charge number of the first, and second-order OAM mode was calculated as l=0.9642 and 1.8766 respectively, which is close to the theoretical value.

Analysis of Subwavelength Metal Hole Array Structure for the Enhancement of Quantum Dot Infrared Photodetectors

  • Ha, Jae-Du;Hwang, Jeong-U;Gang, Sang-U;No, Sam-Gyu;Lee, Sang-Jun;Kim, Jong-Su;Krishna, Sanjay;Urbas, Augustine;Ku, Zahyun
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2013.02a
    • /
    • pp.334-334
    • /
    • 2013
  • In the past decade, the infrared detectors based on intersubband transition in quantum dots (QDs) have attracted much attention due to lower dark currents and increased lifetimes, which are in turn due a three-dimensional confinement and a reduction of scattering, respectively. In parallel, focal plane array development for infrared imaging has proceeded from the first to third generations (linear arrays, 2D arrays for staring systems, and large format with enhanced capabilities, respectively). For a step further towards the next generation of FPAs, it is envisioned that a two-dimensional metal hole array (2D-MHA) structures will improve the FPA structure by enhancing the coupling to photodetectors via local field engineering, and will enable wavelength filtering. In regard to the improved performance at certain wavelengths, it is worth pointing out the structural difference between previous 2D-MHA integrated front-illuminated single pixel devices and back-illuminated devices. Apart from the pixel linear dimension, it is a distinct difference that there is a metal cladding (composed of a number of metals for ohmic contact and the read-out integrated circuit hybridization) in the FPA between the heavily doped gallium arsenide used as the contact layer and the ROIC; on the contrary, the front-illuminated single pixel device consists of two heavily doped contact layers separated by the QD-absorber on a semi-infinite GaAs substrate. This paper is focused on analyzing the impact of a two dimensional metal hole array structure integrated to the back-illuminated quantum dots-in-a-well (DWELL) infrared photodetectors. The metal hole array consisting of subwavelength-circular holes penetrating gold layer (2DAu-CHA) provides the enhanced responsivity of DWELL infrared photodetector at certain wavelengths. The performance of 2D-Au-CHA is investigated by calculating the absorption of active layer in the DWELL structure using a finite integration technique. Simulation results show the enhanced electric fields (thereby increasing the absorption in the active layer) resulting from a surface plasmon, a guided mode, and Fabry-Perot resonances. Simulation method accomplished in this paper provides a generalized approach to optimize the design of any type of couplers integrated to infrared photodetectors.

  • PDF

Influence of Carrier Trap in InAs/GaAs Quantum-Dot Solar Cells (InAs/GaAs 양자점 태양전지에서 전하트랩의 영향)

  • Han, Im Sik;Kim, Jong Su;Park, Dong Woo;Kim, Jin Soo;Noh, Sam Kyu
    • Journal of the Korean Vacuum Society
    • /
    • v.22 no.1
    • /
    • pp.37-44
    • /
    • 2013
  • In order to investigate an influence of carrier trap by quantum dots (QDs) on the solar parameters, in this study, the $p^+-QD-n/n^+$ solar cells with InAs/GaAs QD active layers are fabricated, and their characteristics are investigated and compared with those of a GaAs matrix solar cell (MSC). Two different types of QD structures, the Stranski-Krastanow (SK) QD and the quasi-monolayer (QML) QD, have been introduced for the QD solar cells, and the parameters (open-circuit voltage ($V_{OC}$), short-cirucuit current ($I_{SC}$), fill factor (FF), conversion efficiency (CE)) are determined from the current-voltage characteristic curves under a standard solar illumination (AM1.5). In SK-QSC, while FF of 80.0% is similar to that of MSC (80.3%), $V_{OC}$ and $J_{SC}$ are reduced by 0.03 V and $2.6mA/cm^2$, respectively. CE is lowered by 2.6% as results of reduced $V_{OC}$ and $J_{SC}$, which is due to a carrier trap into QDs. Though another alternative structure of QML-QD to be expected to relieve the carrier trap have been firstly tried for QSC in this study, it shows negative results contrary to our expectations.

Investigation of Hetero - Material - Gate in CNTFETs for Ultra Low Power Circuits

  • Wang, Wei;Xu, Min;Liu, Jichao;Li, Na;Zhang, Ting;Jiang, Sitao;Zhang, Lu;Wang, Huan;Gao, Jian
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.15 no.1
    • /
    • pp.131-144
    • /
    • 2015
  • An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of ${\Phi}_{M1}/{\Phi}_{M2}/{\Phi}_{M3}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

Effect of Surface Microstructure of Silicon Substrate on the Reflectance and Short-Circuit Current (실리콘 기판 표면 형상에 따른 반사특성 및 광 전류 개선 효과)

  • Yeon, Chang Bong;Lee, Yoo Jeong;Lim, Jung Wook;Yun, Sun Jin
    • Korean Journal of Materials Research
    • /
    • v.23 no.2
    • /
    • pp.116-122
    • /
    • 2013
  • For fabricating silicon solar cells with high conversion efficiency, texturing is one of the most effective techniques to increase short circuit current by enhancing light trapping. In this study, four different types of textures, large V-groove, large U-groove, small V-groove, and small U-groove, were prepared by a wet etching process. Silicon substrates with V-grooves were fabricated by an anisotropic etching process using a KOH solution mixed with isopropyl alcohol (IPA), and the size of the V-grooves was controlled by varying the concentration of IPA. The isotropic etching process following anisotropic etching resulted in U-grooves and the isotropic etching time was determined to obtain U-grooves with an opening angle of approximately $60^{\circ}$. The results indicated that U-grooves had a larger diffuse reflectance than V-grooves and the reflectances of small grooves was slightly higher than those of large grooves depending on the size of the grooves. Then amorphous Si:H thin film solar cells were fabricated on textured substrates to investigate the light trapping effect of textures with different shapes and sizes. Among the textures fabricated in this work, the solar cells on the substrate with small U-grooves had the largest short circuit current, 19.20 mA/$cm^2$. External quantum efficiency data also demonstrated that the small, U-shape textures are more effective for light trapping than large, V-shape textures.

Feasibility of Single-Shot Dual-Energy X-ray Imaging Technique for Printed-Circuit Board Inspection (인쇄회로기판 검사를 위한 단일조사 이중에너지 엑스선 영상기법의 유용성에 관한 연구)

  • Kim, Seung Ho;Kim, Dong Woon;Kim, Daecheon;Kim, Junwoo;Park, Ji Woong;Park, Eunpyeong;Kim, Jinwoo;Kim, Ho Kyung
    • Journal of Radiation Industry
    • /
    • v.9 no.3
    • /
    • pp.137-141
    • /
    • 2015
  • A single-shot dual-energy x-ray imaging technique has been developed using a sandwich detector by stacking two detectors, in which the front and rear detectors respectively produce relatively lower and higher x-ray energy images. Each detector layer is composed of a phosphor screen coupled with a photodiode array. The front detector layer employs a thinner phosphor screen, whereas the rear detector layer employs a thicker phosphor screen considering the quantum efficiency for x-ray photons with higher energies. We have applied the proposed method into the inspection of printed circuit boards, and obtained dual-energy images with background clutter suppressed. In addition, the single-shot dual-energy method provides sharper-edge images than the conventional radiography because of the unsharp masking effect resulting from the use of different thickness phosphors between the two detector layers. It is promising to use the single-shot dual-energy x-ray imaging for high-resolution nondestructive testing. For the reliable use of the developed method, however, more quantitative analysis is further required in comparisons with the conventional method for various types of printed circuit boards.