• 제목/요약/키워드: Pyramid texturing

검색결과 16건 처리시간 0.022초

RIE 공정 조건에 의한 피라미드 구조의 블랙 실리콘 형성 (Black Silicon of Pyramid Structure Formation According to the RIE Process Condition)

  • 조준환;공대영;조찬섭;김봉환;배영호;이종현
    • 센서학회지
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    • 제20권3호
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    • pp.207-212
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    • 2011
  • In this study, pyramid structured black silicon process was developed in order to overcome disadvantages of using wet etching to texture the surface of single crystalline silicon and using grass/needle-like black silicon structure. In order to form the pyramidal black silicon structure on the silicon surface, the RIE system was modified to equip with metal-mesh on the top of head shower. The process conditions were : $SF_6/O_2$ gas flow 15/15 sccm, RF power of 200 W, pressure at 50 mTorr ~ 200 mTorr, and temperature at $5^{\circ}C$. The pressure did not affect the pyramid structure significantly. Increasing processing time increased the size of the pyramid, however, the size remained constant at 1 ${\mu}M$ ~ 2 ${\mu}M$ between 15 minutes ~ 20 minutes of processing. Pyramid structure of 1 ${\mu}M$ in size showed to have the lowest reflectivity of 7 % ~ 10 %. Also, the pyramid structure black silicon is more appropriate than the grass/needle-like black silicon when creating solar cells.

Low reflectance of sub-texturing for monocrystalline Si solar cell

  • Chang, Hyo-Sik;Jung, Hyun-Chul;Kim, Hyoung-Tae
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.249-249
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    • 2010
  • We investigated novel surface treatment and its impact on silicon photovoltaic cells. Using 2-step etching methods, we have changed the nanostructure on pyramid surface so that less light is reflected. This work proposes an improved texturing technique of mono crystalline silicon surface for solar cells with sub-nanotexturing process. The nanotextured silicon surface exhibits a lower average reflectivity (~4%) in the wavelength range of 300-1100nm without antireflection coating layer. It is worth mentioning that the surface of pyramids may also affect the surface reflectance and carrier lifetime. In one word, we believe nanotextruing is a promising guide for texturization of monocrystalline silicon surface.

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등방성 에칭과 이방성 에칭이 태양전지 셀의 전기적인 특성에 미치는 효과 (Variation of Electric Properties Depending on Isotropic and Anisotropic Texturing of Solar Cell)

  • 오데레사
    • 반도체디스플레이기술학회지
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    • 제10권4호
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    • pp.31-35
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    • 2011
  • For high efficiency of Si-cells, Si wafers were textured by the KOH and NaOH etching solution to decreas the reflectance at surfaces of the cells. The textured surfaces were shown various types such as isotropic and anisotropic depending on the etching solution. The reflectance at sample of an anisotropic form with pyramid type was lower than that of isotropic form. The surface with isotropic form of general tiny circles on the surface increased the efficiency, however, the reflectance of it was increased. The efficiency was increased on surface with low roughness.

고효율 실리콘 태양전지를 위한 lotus surface 구조의 형성 (Formation of lotus surface structure for high efficiency silicon solar cell)

  • 정현철;백용균;김효한;음정현;최균;김형태;장효식
    • 한국결정성장학회지
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    • 제20권1호
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    • pp.7-11
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    • 2010
  • 단결정 실리콘 태양전지의 광학적 손실을 감소시키는 표면 텍스쳐링은 최종 셀의 효율을 향상시키기 위하여 매우 중요하다. 본 연구에서는 2-step texturing의 공정으로 기존의 텍스쳐링에서 이루어진 피라미드에 수 많은 sub-micrometer 사이즈의 구조를 형성시켰다. $AgNO_3$ 용액으로 웨이퍼 표면에 Ag코팅을 한 후, 그 웨이퍼를 다시 HF/$H_2O_2$ 용액으로 수십초 동안 식각을 거치게 된다. 결과적으로, 피라미드 위에 생성된 수 nm사이즈의 구조물들은 $AgNO_3$의 농도 및 식각 시간의 변화에 의해 그 크기와 굵기가 변화하는 것을 알 수 있었다. 웨이퍼의 표면이 2-step texturing에 의해 식각이 이루어지면 연잎의 거친 표면과 비슷해지고, 그 결과 평균 10% 이상의 반사율을 보이던 기존 웨이퍼에서 3% 이하의 낮은 반사율을 얻을 수 있었다. 이는 일반적인 텍스쳐링과 anti-reflection coating을 거친 웨이퍼의 반사율보다 낮은 결과이다.

와이어 소잉 데미지 층이 단결정 실리콘 태양전지 셀 특성에 미치는 영향 (Relation Between Wire Sawing-damage and Characteristics of Single Crystalline Silicon Solar-cells)

  • 김일환;박준성;박재근
    • Current Photovoltaic Research
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    • 제6권1호
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    • pp.27-30
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    • 2018
  • The dependency of the electrical characteristics of silicon solar-cells on the depth of damaged layer induced by wire-sawing process was investigated. To compare cell efficiency with residual sawing damage, silicon solar-cells were fabricated by using as-sawn wafers having different depth of saw damage without any damaged etching process. The damaged layer induced by wire-sawing process in silicon bulk intensely influenced the value of fill factor on solar cells, degrading fill factor to 57.20%. In addition, the photovoltaic characteristics of solar cells applying texturing process shows that although the initial depth of saw-damage induced by wire-sawing process was different, the value of short-circuit current, fill-factor, and power-conversion-efficiency have an almost same, showing ~17.4% of cell efficiency. It indicated that the degradation of solar-cell efficiency induced by wire-sawing process could be prevented by eliminating all damaged layer through sufficient pyramid-surface texturing process.

Potential of chemical rounding for the performance enhancement of pyramid textured p-type emitters and bifacial n-PERT Si cells

  • Song, Inseol;Lee, Hyunju;Lee, Sang-Won;Bae, Soohyun;Hyun, Ji Yeon;Kang, Yoonmook;Lee, Hae-Seok;Ohshita, Yoshio;Ogurad, Atsushi;Kim, Donghwan
    • Current Applied Physics
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    • 제18권11호
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    • pp.1268-1274
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    • 2018
  • We have investigated the effects of chemical rounding (CR) on the surface passivation and/or antireflection performance of $AlO_{x^-}$ and $AlO_x/SiN_x:H$ stack-passivated pyramid textured $p^+$-emitters with two different boron doping concentrations, and on the performance of bifacial n-PERT Si solar cells with a front pyramid textured $p^+$-emitter. From experimental results, we found that chemical rounding markedly enhances the passivation performance of $AlO_x$ layers on pyramid textured $p^+$-emitters, and the level of performance enhancement strongly depends on boron doping concentration. Meanwhile, chemical rounding increases solar-weighted reflectance ($R_{SW}$) from ~2.5 to ~3.7% for the $AlO_x/SiN_x:H$ stack-passivated pyramid textured $p^+$-emitters after 200-sec chemical rounding. Consequently, compared to non-rounded bifacial n-PERT Si cells, the short circuit current density Jsc of 200-sec-rounded bifacial n-PERT Si cells with ~60 and ${\sim}100{\Omega}/sq$ $p^+$-emitters is reduced by 0.8 and $0.6mA/cm^2$, respectively under front $p^+$-emitter side illumination. However, the loss in the short circuit current density Jsc is fully offset by the increased fill factor FF by 0.8 and 1.5% for the 200-sec-rounded cells with ~60 and ${\im}100{\Omega}/sq$ $p^+$-emitters, respectively. In particular, the cell efficiency of the 200-sec-rounded cells with a ${\sim}100{\Omega}/sq$ $p^+$-emitter is enhanced as a result, compared to that of the non-rounded cells. Based on our results, it could be expected that the cell efficiency of bifacial n-PERT Si cells would be improved without additional complicated and costly processes if chemical rounding and boron doping processes can be properly optimized.