• Journal of Power Electronics
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• v.14 no.3
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• pp.519-530
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• 2014

A novel simplified pulse width modulation(PWM) strategy for neutral point clamped (NPC) three-level converter is proposed in this paper.The direct output voltage modulation is applied to reduce the calculation time. Based on this strategy, several optimized control methods are proposed. The neutral point potential balancing algorithm is discussed and a fine neutral point potential balancing scheme is introduced. Moreover, the minimum pulse width compensation and switching losses reduction can be easily achieved using this modulation strategy. This strategy also gains good results even with the unequal DC link capacitor. The modulation principle is studied in detail and the validity of this simplified PWM strategy is experimentally verified in this paper. The experiment results indicated that the proposed PWM strategy has excellent performance, and the neutral point potential can be balanced well with unequal DC link captaincies.

• Journal of IKEEE
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• v.23 no.3
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• pp.1104-1107
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• 2019

This paper proposes a DC-DC boost converter for wearable AMOLED display using dead time controller to reduce dead time and improve power efficiency. Also the DC-DC boost converter adopts PWM-SPWM (set-time variable pulse width modulation) dual-mode to enhance power efficiency under light load and decrease output voltage ripple. The proposed circuit has been designed using $0.18{\mu}m$ BCDMOS process. Simulation results show that the circuit has power efficiency of 39%~96% and output ripple voltage of 2 mV under load current range of 1 mA~70 mA. The power efficiency of the proposed circuit is up to 2% higher than the previous PWM-SPWM method and up to 8% higher than only PWM method.

• Journal of Korea Multimedia Society
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• v.19 no.2
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• pp.352-359
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• 2016

This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.1
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• pp.44-52
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• 2017

This paper describes a 100 kW high-efficiency isolated DC-DC converter for DC distribution system. The DC-DC converter consists of two dual-active-bridge (DAB) converters in parallel. The operating principle of the DAB converter is explained, and the algorithm for parallel operation of the DAB converters is proposed. Simulation and experiments are conducted to verify the performance of the proposed system. Experimental results demonstrate that the developed converter excellently marks 97.4 percent of peak efficiency under its normal operating condition.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.5
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• pp.415-421
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• 2014

This study proposes a model-based predictive control for interleaved multi-phase DC/DC converters. The power values necessary to adjust the output voltage in the succeeding are predicted using a converter model. The output power is controlled by selecting the optimal duty cycle. The proposed method does not require controller loops and modulators for converter switching. This method can control the converter by calculating the optimal duty cycle, which minimizes the error between the reference and actual output voltage. The effectiveness of the proposed method is verified through simulations and experiments.

• Journal of IKEEE
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• v.23 no.3
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• pp.1061-1067
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• 2019

In this paper, a highly integrated 3-channel DC-DC converter is designed using power transistor width scaling (PTWS). For positive voltage, $V_{POS}$, a boost converter is designed using the set-time variable pulse width modultaion (SPWM) dual-mode and PTWS to improve efficiency at light load. For negative voltage, $V_{NEG}$, a 0.5 x regulated inverting charge pump is designed with pulse skipping modulation (PSM) controller to reduce power consumption, and for an additional positive voltage, $V_{AVDD}$, a LDO circuit is designed. The proposed DC-DC converter has been designed using a $0.18{\mu}m$ BCDMOS process. Simulation results show that the proposed converter has power efficiency of 56%~90% for load current range of 1 mA~70 mA and output ripple voltage less than 5 mV at positive voltage.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.1042-1046
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• 1998

A new soft switching isolated bi-directional phase shifted pulse width modulation (PSPWM) dc/dc converter is presented. Due to the use of the energy recovery snubber, the isolated bi-directional PSPWM dc/dc converter has a significant reduction of switching losses in the switching devices of the primary and secondary side bridge, respectively. The proposed soft switching bi-directional PSPWM FB dc/dc converter provides an energy recovery snubber which consists of two fast recovery diodes, a resonant capacitor and a resonant inductor. The complete operating principles and simulation results will be presented.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.3
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• pp.243-249
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• 2001

This paper proposes a full wave mode ZVT-PWM boost converter. The converter with the auxiliary switch in a full wave mode makes possible soft switching operation of all switches including the auxiliary switch whereas the auxiliary switch is turned off with hard switching in the conventional converter. Therefore, the proposed converter reduces the turn-off switching loss and switching noise of the auxiliary switch without additional passive and/or active elements and high power density system can be realized.

• Journal of Power Electronics
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• v.12 no.4
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• pp.643-653
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• 2012

An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.

• Journal of the Korean Society for Railway
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• v.14 no.5
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• pp.411-415
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• 2011

DC/DC switching power converters are commonly used to generate a regulated DC output voltages with high efficiencies from different DC input sources. The voltage mode DC/DC converter utilizes MOSFET (metal-oxide semiconductor field effect transistor), inductor, and a PWM (pulse-width modulation) controller with oscillator, amplifier, and comparator, etc. to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter and a buck converter containing a switched-mode power supply are studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by program of SPICE, and the PWM controller is implemented to check the operation. In addition, power efficiency is analyzed based on the specification of each component.