• Title/Summary/Keyword: Pulse Power Supply

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Design and development of enhanced criticality alarm system for nuclear applications

  • Srinivas Reddy, Padi;Kumar, R. Amudhu Ramesh;Mathews, M. Geo;Amarendra, G.
    • Nuclear Engineering and Technology
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    • v.50 no.5
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    • pp.690-697
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    • 2018
  • Criticality alarm systems (CASs) are mandatory in nuclear plants for prompt alarm in the event of any criticality incident. False criticality alarms are not desirable as they create a panic environment for radiation workers. The present article describes the design enhancement of the CAS at each stage and provides maximum availability, preventing false criticality alarms. The failure mode and effect analysis are carried out on each element of a CAS. Based on the analysis, additional hardware circuits are developed for early fault detection. Two different methods are developed, one method for channel loop functionality test and another method for dose alarm test using electronic transient pulse. The design enhancement made for the external systems that are integrated with a CAS includes the power supply, criticality evacuation hooter circuit, radiation data acquisition system along with selection of different soft alarm set points, and centralized electronic test facility. The CAS incorporating all improvements are assembled, installed, tested, and validated along with rigorous surveillance procedures in a nuclear plant for a period of 18,000 h.

A Design of DLL-based Low-Power CDR for 2nd-Generation AiPi+ Application (2세대 AiPi+ 용 DLL 기반 저전력 클록-데이터 복원 회로의 설계)

  • Park, Joon-Sung;Park, Hyung-Gu;Kim, Seong-Geun;Pu, Young-Gun;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.4
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    • pp.39-50
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    • 2011
  • In this paper, we presents a CDR circuit for $2^{nd}$-generation AiPi+, one of the Intra-panel Interface. The speed of the proposed clock and data recovery is increased to 1.25 Gbps compared with that of AiPi+. The DLL-based CDR architecture is used to generate the multi-phase clocks. We propose the simple scheme for frequency detector (FD) to mitigate the harmonic-locking and reduce the complexity. In addition, the duty cycle corrector that limits the maximum pulse width is used to avoid the problem of missing clock edges due to the mismatch between rising and falling time of VCDL's delay cells. The proposed CDR is implemented in 0.18 um technology with the supply voltage of 1.8 V. The active die area is $660\;{\mu}m\;{\times}\;250\;{\mu}m$, and supply voltage is 1.8 V. Peak-to-Peak jitter is less than 15 ps and the power consumption of the CDR except input buffer, equalizer, and de-serializer is 5.94 mW.

Development of 2-kW Class C Amplifier Using GaN High Electron Mobility Transistors for S-band Military Radars (S대역 군사 레이더용 2kW급 GaN HEMT 증폭기 개발)

  • Kim, Si-Ok;Choi, Gil-Wong;Yoo, Young-Geun;Lim, Byeong-Ok;Kim, Dong-Gil;Kim, Heung-Geun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.3
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    • pp.421-432
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    • 2020
  • This paper proposes a 2-kW solid-state power amplifier (SSPA) developed by employing power amplifier pallets designed using gallium-nitride high electron mobility transistors, which is used in S-band military radars and to replace existing traveling-wave tube amplifier (TWTA). The SSPA consists of a high-power amplifier module, which combines eight power amplifier pallets, a drive amplifier module, a digital control module, and a power supply unit. First, the amplifier module and component were integrated into a small package to account for space limitations; next, an on-board harmonic filter was fabricated to reject spurious components; and finally, an auto gain control system was designed for various duty ratios because recent military radar systems are all active phase radars using the pulse operation mode. The developed SSPA exhibited a max gain of 48 dB and an output power ranging between 63-63.6 dBm at a frequency band of 3.1 to 3.5 GHz. The auto gain control function showed that the output power is regulated around 63 dBm despite the fluctuation of the input power from 15-20 dBm. Finally, reliability of the developed system was verified through a temperature environment test for nine hours at high (55 ℃) / low (-40℃) temperature profile in accordance with military standard 810. The developed SSPA show better performance such as light weight, high output, high gain, various safety function, low repair cost and short repair time than existing TWTA.

Design and testing of 25kW bipolar pulse power supply for mineral exploration of Mt.Taebaek (광물 탐사용 25kW급 양극성 펄스전원장치 설계 및 태백산 탐사시험)

  • Bae, Jung-Soo;Kim, Shin;Kim, Tae-Hyun;Yu, Chan-Hun;Kim, Hyoung-Suk;Kim, Jong-Soo;Jang, Sung-Roc
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.257-259
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    • 2019
  • 본 논문은 광물 탐사를 위한 25kW급 양극성 펄스전원장치에 대해 기술한다. 소프트스위칭 기반의 고효율 LCC 공진형 컨버터와 풀 브리지 기반 양극성 펄스 스위칭부로 구성된 단위 모듈(500V, 12.5A)을 기반으로 설계한다. LCC 공진형 컨버터는 전류의 rms값을 줄이기 위해 공진 전류모양을 사다리꼴 형태로 설계하여 도전 손실측면에서 크게 개선되었고, 높은 전력밀도를 달성하기 위해 변압기의 누설 인덕턴스를 공진 파라메터로 활용한다. 추가적으로, 짧은 펄스폭을 가지도록 설계된 게이트 구동 회로는 출력을 DC에서 8kHz의 넓은 주파수 범위에서 동작시킬 뿐만 아니라 게이트 신호를 전달하기 위한 변압기의 사이즈를 줄이기 위해 제안된다. 단위모듈 형태로 개발된 양극성 펄스전원장치는 4개의 모듈이 직병렬로 결선되어 부하조건에 따라 Grounded dipole mode (2kV, 12.5A) 또는 Loop mode (500V, 50A)로 동작한다. 4모듈 직병렬 운전 시 발생하는 모듈 간 전압 불균형 문제를 해결하기 위해 메인 변압기에 보상권선이 감긴다. 본 논문에서는 개발된 양극성 펄스전원 장치의 설계를 저항부하 실험 및 태백산 탐사시험 결과를 바탕으로 검증한다.

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Design and Evaluation of Pulsed Electromagnetic Field Stimulation Parameter Variable System for Cell and Animal Models (세포 및 동물모델용 펄스형 전자기장 자극 파라미터 가변장치 설계 및 평가)

  • Lee, Jawoo;Park, Changsoon;Kim, Junyoung;Lee, Yongheum
    • Journal of Biomedical Engineering Research
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    • v.43 no.1
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    • pp.11-18
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    • 2022
  • An electromagnetic generator with variable stimulation parameters is required to conduct basic research on magnetic flux density and frequency for pulsed electromagnetic fields (PEMFs). In this study, we design an electromagnetic generator that can conduct basic research by providing parameters optimized for cell and animal experimental conditions through adjustable stimulation parameters. The magnetic core was selected as a solenoid capable of uniform and stable electromagnetic stimulation. The solenoid was designed in consideration of the experimental mouse and cell culture dish insertion. A voltage and current adjustable power supply for variable magnetic flux density was designed. The system was designed to be adjustable in frequency and pulse width and to enable 3-channel output. The reliability of the system and solenoid was evaluated through magnetic flux density, frequency, and pulse width measurements. The measured magnetic flux density was expressed as an image and qualitatively observed. Based on the acquired image, the stimulation area according to the magnetic flux density decrease rate was extracted. The PEMF frequency and pulse width error rates were presented as mean ± SD, and were confirmed to be 0.0928 ± 0.0934% and 0.529 ± 0.527%, respectively. The magnetic flux density decreased as the distance from the center of the solenoid increased, and decreased sharply from 60 mm or more. The length of the magnetic stimulation area according to the degree of magnetic flux density decrease was obtained through the magnetic flux density image. A PEMF generator and stimulation parameter control system suitable for cell and animal models were designed, and system reliability was evaluated.

A Digital Input Class-D Audio Amplifier (디지털 입력 시그마-델타 변조 기반의 D급 오디오 증폭기)

  • Jo, Jun-Gi;Noh, Jin-Ho;Jeong, Tae-Seong;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.11
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    • pp.6-12
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    • 2010
  • A sigma-delta modulator based class-D audio amplifier is presented. Parallel digital input is serialized to two-bit output by a fourth-order digital sigma-delta noise shaper. The output of the digital sigma-delta noise shaper is applied to a fourth-order analog sigma-delta modulator whose three-level output drives power switches. The pulse density modulated (PDM) output of the power switches is low-pass filtered by an LC-filter. The PDM output of the power switches is fed back to the input of the analog sigma-delta modulator. The first integrator of the analog sigma-delta modulator is a hybrid of continuous-time (CT) and switched-capacitor (SC) integrator. While the sampled input is applied to SC path, the continuous-time feedback signal is applied to CT path to suppress the noise of the PDM output. The class-D audio amplifier is fabricated in a standard $0.13-{\mu}m$ CMOS process and operates for the signal bandwidth from 100-Hz to 20-kHz. With 4-${\Omega}$ load, the maximum output power is 18.3-mW. The total harmonic distortion plus noise and dynamic range are 0.035-% and 80-dB, respectively. The modulator consumes 457-uW from 1.2-V power supply.

Design of a CCM/DCM dual mode DC-DC Buck Converter with Capacitor Multiplier (커패시터 멀티플라이어를 갖는 CCM/DCM 이중모드 DC-DC 벅 컨버터의 설계)

  • Choi, Jin-Woong;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.9
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    • pp.21-26
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    • 2016
  • This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

The Development of Electric Ballast for a Instant Start/Restart of Metalhalide Lamp (메탈핼라이드램프용 순시점등/재점등 전자식안정기 개발)

  • Kim, Su-Kyoung;Jang, Woo-Jin
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.5
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    • pp.9-15
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    • 2004
  • The most shortcoming of metalhalide lamps is what the instant restarting cannot be realized when the arc tube is in the hot condition. The discharge starting voltage of arc tube in the hot condition is much higher than in the cold condition. Therefore it takes about five minutes to restart the metalhalide lamps, that is to say, it is possible to start when the pressure and the temperature are decreased. But, if the lamp is restarted in the hot condition, we must supply the high voltage pulse with 20[kV] at the both electrode of lamp. The proposed electronic ballast is consist of a electromagnetic interference(EMI) filter, a power factor correction(PFC) circuit, a flyback converter, a half-bridge inverter, and a high voltage igniter circuit. By this composition we can start/restart the lamp with the voltage 20[kV], even if the lamp is in the hot condition.

Design of high slew-rate OTA for DC-DC converters (DC-DC 컨버터용 높은 슬류율의 OTA 설계)

  • Kim, In-Suk;Ryu, Seong-Young;Roh, Jeong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.10 s.352
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    • pp.118-125
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    • 2006
  • A new error amplifier is presented for fast transient response of DC-DC converters. The amplifier has low quiescent current to achieve high power conversion efficiency, but it can supply sufficient current during large signal operation. Two comparators detect large-signal variations, and turn on extra current supplier if necessary. The amount of extra current is well controlled, so that the system stability can be guaranteed in various operating conditions. The simulation results show that the new error amplifier achieves significant improvement in transient response than the conventional one.

A study on a moving characteristics of charged particle in uniform electric field of Charged Particle type Display (대전입자형 디스플레이의 균등전계내 대전입자의 거동특성에 관한 연구)

  • Lee, Dong-Jin;Kim, Young-Cho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.6
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    • pp.1186-1190
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    • 2009
  • In this paper, we studied on a characteristic of movement of charged particle in equal electric field. In order to fabricate a panel, we used positive charged toner particles of black and negative one of yellow. Panel was biased rectangle pulse without any overshoot. Also, panel's optical characteristics with contrast ratio and viewing angle is measured with RT-200. Response time was measure by using incident laser and detective photodiode. The distribution of m/q of particles by driving in panel throughout the contrast ratio and response time. As a results, driving voltage, contrast ratio, and response time are decided by m/q of charged particles and when m/q of charged particles in panel have regular distribution, it is induce improvement driving characteristics.