• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 1999년도 추계학술대회 논문집
• /
• pp.311-314
• /
• 1999

Ferroelectric PZT heterolayered thin films were fabricated by spin coating method on the Pt/Ti/SiO$_2$/Si substrate using PZT(10/90) and PZT(90/10) metal alkoxide solutions. All PZT heterolayered films showed a homogeneous grain structure without presence of the rosette structure. It can be assumed that the lower PZT layers a role of nucleation site or seeding layer for the formation of the upper PZT layer. Zr and Ti diffusion into the Pt electrode were mainly distributed at the surface of Pt electrode beneath the PZT/Pt interface. The PZT/Pt interfacial layer showed a microstructure characterized by a grain phase surrounded by a Pb-deficient pyrochlore matrix phase. The relative dielectric constant and the dielectric loss of the PZT-6 film were 567 and 3.6, respectively.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2007년도 제38회 하계학술대회
• /
• pp.274-275
• /
• 2007

The investigation of the equivalent circuit models for the electrode/electrolyte interface has been pursued for a long time by several researchers. Previous circuit models fit the experimental results in limited conditions such as frequency range, type of electrode, or electrolyte. This paper describes a new electrical circuit model and its capability of fitting the experimental results. Electrochemical impedance spectroscopy was used to characterize the interface for Au, Pt, and stainless steel electrode in 0.9% NaCl solution. Both the proposed model and the previous model were applied to fit the measured impedance results for comparison. The proposed model fits the experimental data more accurately than other models especially at the low frequency range, and it enables us to predict the impedance at very low frequency range, including DC, using the proposed model.

• 한국재료학회지
• /
• 제10권10호
• /
• pp.684-690
• /
• 2000

Metal-Ferroelectric-Metal(MFM) 구조의 개퍼시터에서 $Pb(Zr,Ti)O_3(PZT)$-전극 계면층이 PZT 박막 특성에 기여하는 영향을 알아보기 위하여 Pt/PZT/계면층/Pt/$TiO_2/SiO_2$/Si 구조의 캐퍼시터를 제작하였다. 계면층으로 사용될 물질들 중에서 $PbTiO_3(PT)$ 층을 sol-gel 방법으로 형성하였으며, PbO, $ZrO_2,\;TiO_2$ 층들을 reactive sputtering 방법으로 형성하였다. PZT박막을 구성하는 원소들로 이루어진 단순 산화물들의 특성을 평가하기 위하여 PbO, $ZrO_2,\;TiO_2$를 계면층으로 사용하여 $600^{\circ}C$에서 열처리를 실시하였고, 이 경우에는 $TiO_2$가 가장 우수하게 PZT의 결정립 크기를 미세하게 하는 효과를 보였으나, 두께가 증가함에 따라 표면 거칠기가 증가하고 anatase 상으로 남기 때문에 강유전특성이 열화되었다. 반면에 PT 박막을 계면층으로 사용한 경우에는 결정립 크기의 감소와 더불어 전기적인 특성도 향상되었다. 또한 PZT의 핵생성 위치를 판단하기 위하여 PT 삽입층의 위치를 변화하며, 실험한 결과, 하부전극과 PZT 박막의 계면에 PT 삽입층을 형성하였을 경우에 가장 효과적인 seed로서의 역할을 하였다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
• /
• pp.163-166
• /
• 2002

We investigated structural and electrical properties of Metal-Oxide-Semiconductor(MOS) structure using Hafnium $oxide(HfO_{2})$ as high-k gate dielectric material. $HfO_{2}$ films are ultrathin gate dielectric material witch have a thickness less than 2.0nm， so it is spotlighted to be substituted $SiO_{2}$ as gate dielectric material. In this paper We have grown $HfO_{2}$ films with pt electrode on P-type Silicon substrate by RF magnetron sputtering system using $HfO_{2}$ target and oserved the property of semiconductor-oxide interface. Using pt electrode, it is necessary to be annealed at ${300^{\circ}C}$. This process is to increase an adhesion ratio between $HfO_{2}$ films with pt electrode. In film deposition process, the deposition time of $HfO_{2}$ films is an important parameter. Structura1 properties are invetigated by AES depth profile, and electrical properties by Capacitance-Voltage characteristic. Interface trap density are measured to observe the interface between $HfO_{2}$ with Si using High-frequency(1MHz) C-V and Quasi - static C-V characteristic.

• 전자공학회논문지A
• /
• 제32A권7호
• /
• pp.77-84
• /
• 1995

We studied the effects of the Zr/Ti ration and the bottom electrode (Pt or ITO) on the electrical properties of PZT thin films prepared by sol-gel method. Their permittivities and tagent losses with the variation of frequencies were measured by the LCR meter and their maximum polarizations, remanent polarizations, and coercive fields were obtained from the hysteresis loops measured by the Sawyer-Tower circuit. For the PZT thin film of the Zr/Ti ration of 53/47, permittivity at 10kHz, coercive field, maximum and remanent polarizations ere measured as 952, 20.7kV/cm, 10.43${\mu}C/cm^{2}$ and 4.3${\mu}C/cm^{2}$, respectively. For the film of the Zr/Ti ration of 25/75, coercive field, maximum and remanent polarizations were measured as 33.12kV/cm, 5.59${\mu}C/cm^{2}$ and 1.5${\mu}C/cm^{2}$, respectively. For the film of the Zr/Ti ratio of 75/25, they were measured as 23.8kV/cm, 7.45${\mu}C/cm^{2}$, and 3.5${\mu}C/cm^{2}$, repectively. Our investigation into the effects of the lower electrode on the electrical properties of PZT films showed the following results. The permittivities of the PZT films deposited on the ITO electrode decreased more quickly than those of the PZT films on the Pt electrode. The tangent losses of the former films increased more quickly than those of the latter. These may be due to the degradation of the quality of the interface between the electrode and the film, which results from the diffusion of Pb. It is also noticeable that permittivities and tangent losses of the PZT films deposited on the ITO electrode varied differently with the Zr/Ti ratio. This may indicate that the quality of the interface between the electrode and the film changes with the Zr/Ti ration of the PZT film.

• 한국재료학회지
• /
• 제14권10호
• /
• pp.688-695
• /
• 2004

The capacitor contact barrier(CCB) layers have been introduced in the FeRAM integration to prevent the Pt/Al reaction during the back-end processes. Therefore, the interdiffusion and intermetallic formation in $Pt(1500{\AA})/Al(3000{\AA})$ film stacks were investigated over the annealing temperature range of $100\sim500^{\circ}C$. The interdiffusion in Pt/Al interface started at $300^{\circ}C$ and the stack was completlely intermixed after annealing over $400^{\circ}C$ in nitrogen ambient for 1 hour. Both XRD and SBM analyses revealed that the Pt/Al interdiffusion formed a single phase of $RtAl_2$ intermetallic compound. On the other hand, in the presence of TiN($1000{\AA}$) barrier layer at the Pt/Al interface, the intermetallic formation was completely suppressed even after the annealing at $500^{\circ}C$. These were in good agreement with the predicted effect of the TiN diffusion barrier layer. But the conventional TiN CCB layer could not perfectly block the Pt/Al reaction during the back-end processes of the FeRAM integration with the maximum annealing temperature of $420^{\circ}C$. The difference in the TiN barrier properties could be explained by the voids generated on the Pt electrode surface during the integration. The voids were acted as the starting point of the Pt/Al reaction in real FeRAM structure.

• 한국표면공학회:학술대회논문집
• /
• 한국표면공학회 2012년도 춘계학술발표회 논문집
• /
• pp.227-228
• /
• 2012

In interfaces between carbon black or Pt and FTO glass in dye-sensitized solar cell counter electrodes, a marginal resistant channel for electrons, we tried to improve the connection by modifying the sintering process. A stepwise sintering process for carbon black and Pt counter electrodes was applied and its effect on power conversion efficiency was studied. Power conversion efficiencies of built-in DSSC made by a one-step sintering process with carbon black and Pt counter electrodes were about 5.01% and 5.02%, respectively. Cells made with the stepwise sintering process were 5.96% and 6.21%, respectively, indicating an 20% improvement. Fill factor (FF) increased, and it was them main reason for the power conversion efficiency improvement. Step wise sintering increased the adhesion of the interface and reduced the film thickness and surface roughness. As a result, the resistivity of the counter electrode and EIS impedance of DSSCs decreased.

• 한국신재생에너지학회:학술대회논문집
• /
• 한국신재생에너지학회 2009년도 추계학술대회 논문집
• /
• pp.360-363
• /
• 2009

In order to improve the overall power conversion efficiency, it is very important to reduce the interface resistance of dye-sensitized solar cells (DSSCs). In this approach, tiny $TiO_2$ nanoparticles with the primary size of 10~20nm were synthesized and deposited between FTO glass and preformed $TiO_2$ layer by $TiOCl_2$ treatment, and also Pt catalysts were deposited on the counter electrode by both ion-sputter and thermal deposition to reduce the electrolyte-counter electrode interface resistance. The influence of these processes on the performace of DSSCs were discussed in terms of fill factor, short circuit current, and conversion efficiency.

• 마이크로전자및패키징학회지
• /
• 제10권2호
• /
• pp.49-54
• /
• 2003

본 연구에서는 Pt/SrBi$_2$Ta$_2$O$_{9}$(SBT)/Si (MFS)와 Pt/SBT/Pt (MFM) 각각의 구조에서 수소 열처리에 의한 SBT박막의 물리, 전기적 영향에 대해 연구하였다. SBT 박막의 미세구조 및 전기적 특성은 수소 열처리 후에 SBT 박막의 손상으로 열화된다. 특히, Pt 전극에 의한 SBT 박막의 열화 현상을 연구하기 위해 각각 Si 와 Pt 위에 SBT 를 증착하여 같은 조건으로 열처리를 하였다. XRD, XPS, P-V, C-V 측정을 통해 Pt 전극 없이 SBT자체로도 수소 열처리 후에 열화 됨을 확인 할 수 있었다. 또한, 수소 열화현상이라고 하는 촉매 반응으로 SBT 열화 현상이 Pt로 가속화되었다. 이러한 현상을 방지하기 위해서 새로운 Ir 전극을 제안하여 $Ir/IrO_2/SBT/IrO_2$ 구조에서의 수소 열처리 전후 및 회복 열처리를 통해 SBT 박막의 전기적 특성을 연구하였다. P-V측정을 통해 SBT박막을 이용한 MFM구조에서 Ir이 열화 방지용 전극 물질로의 활용 가능성을 확인하였다.

• 전기화학회지
• /
• 제2권1호
• /
• pp.23-26
• /
• 1999

백금$(Pt)/0.1M\;H_2SO_4$, 전해질 계면에서 교류임피던스 측정과 위상이동 방법을 사용하여 Langmuir 흡착등온식을 정성적으로 해석하였다. 위상이동$(\phi)$은 음전위(E<0)와 주파수(f)에 따르며, Pt 일전극(음극)에 흡착된 수소원자$(H_{ads})$의 표면피복율$(\theta)$에 반비례한다. 중간주파수대$(1\~100 Hz)$에서 위상이동 변화$(\phi\;vs.\;E)$는 Langmuir 흡착등온식$(\theta\;vs.\;E)$의 계산과 해석에 사용할 수 있는 실험적인 방법이다. $Pt/0.1M\;H_2SO_4$ 전해질 계면에서 흡착평형상수(K)와 표준자유에너지$({\Delta}G_{ads})$는 각각 $3\times10^{_4}$와 20.1kJ/mol이다.