• Title/Summary/Keyword: Programming Voltage

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Silicon-based 0.69-inch AMOEL Microdisplay with Integrated Driver Circuits

  • Na, Young-Sun;Kwon, Oh-Kyong
    • Journal of Information Display
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    • v.3 no.3
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    • pp.35-43
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    • 2002
  • Silicon-based 0.69-inch AMOEL microdisplay with integrated driver and timing controller circuits for microdisplay applications has been developed using 0.35 ${\mu}m$ l-poly 4-metal standard CMOS process with 5 V CMOS devices and CMP (Chemical Mechanical Polishing) technology. To reduce the large data programming time consumed in a conventional current programming pixel circuit technique and to achieve uniform display, de-amplifying current mirror pixel circuit and the current-mode data driver circuit with threshold roltage compensation are proposed. The proposed current-mode data driver circuit is inherently immune to the ground-bouncing effect. The Monte-Carlo simulation results show that the proposed current-mode data driver circuit has channel-to-channel non-uniformity of less than ${\pm}$0.6 LSB under ${\pm}$70 mV threshold voltage variaions for both NMOS and PMOS transistors, which gives very good display uniformity.

Development of Audible Noise Prediction Formulas Applied to HVAC Transmission Lines Design by Using Genetic Programming (유전프로그래밍에 의한 초고압 송전선로 환경설계용 코로나 소음 예측계산식 개발)

  • Yang, Kwang-Ho;Hwang, Gi-Hyun;Park, June-Ho;Park, Jong-Keun
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.50 no.5
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    • pp.234-240
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    • 2001
  • Audible noise (AN) produced by corona discharges from high voltage transmission lines is one of the more important considerations in line design. Therefore, line designers must pre-determine the AN using prediction formulas. This paper presents the results of applying evolutionary computation techniques using AN data from lines throughout the world to develop new, highly accurate formulas for predicting a A-weighted AN during heavy rain and stable rain from overhead ac lines. Calculated ANs using these new formulas and existing formulas are compared with measured data.

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Design of an Analog Content Addressable Memory Implemented with Floating Gate Treansistors (부유게이트 트랜지스터를 이용한 아날로그 연상메모리 설계)

  • Chai, Yong-Yoong
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.50 no.2
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    • pp.87-92
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    • 2001
  • This paper proposes a new content-addressable memory implemented with an analog array which has linear writing and erasing characteristics. The size of the array in this memory is $2{\times}2$, which is a reasonable structure for checking the disturbance of the unselected cells during programming. An intermediate voltage, Vmid, is used for preventing the interference during programming. The operation for reading in the memory is executed with an absolute differencing circuit and a winner-take-all (WTA) circuit suitable for a nearest-match function of a content-addressable memory. We simulate the function of the mechanism by means of Hspice with 1.2${\mu}m$ double poly CMOS parameters of MOSIS fabrication process.

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An Optimization Method using Evolutionary Computation in Large Scale Power Systems (진화연산을 이용한 대규모 전력계통의 최적화 방안)

  • You, Seok-Ku;Park, Chang-Joo;Kim, Kyu-Ho;Lee, Jae-Gyu
    • Proceedings of the KIEE Conference
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    • 1996.07b
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    • pp.714-716
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    • 1996
  • This paper presents an optimization method for optimal reactive power dispatch which minimizes real power loss and improves voltage profile of power systems using evolutionary computation such as genetic algorithms(GAs), evolutionary programming(EP). and evolution strategy(ES). Many conventional methods to this problem have been proposed in the past, but most these approaches have the common defect of being caught to a local minimum solution. Recently, global search methods such as GAs, EP, and ES are introduced. The proposed methods were applied to the IEEE 30-bus system. Each simulation result, compared with that obtained by using a conventional gradient-based optimization method, Sequential Quadratic Programming (SQP), shows the possibility of applications of evolutionary computation to large scale power systems.

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A Study on the Application of Asynchronous Team Theory for QVC and Security Assessment in a Power System (전력계통의 무효전력 제어 및 안전도 평가를 위한 Asynchronous Team 이론의 적용에 관한 연구)

  • 김두현;김상철
    • Journal of the Korean Society of Safety
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    • v.12 no.3
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    • pp.67-75
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    • 1997
  • This paper presents a study on the application of Asynchronous Team(A-Team) theory for QVC(Reactive power control) and security assessment in a power system. Reactive power control problem is the one of optimally establishing voltage level given reactive power sources, which is very important problem to supply the demand without interruption and needs methods to alleviate a bus voltage limit violation more quickly. It can be formulated as a mixed-integer linear programming(MILP) problem without deteriorating of solution accuracy to a certain extent. The security assessment is to estimate the relative robustness of the system and deterministic approach based on AC load flow calculations is adopted to assess it, especially voltage security. A distance measure, as a measurement for voltage security, is introduced. In order to analyze the above two problem, reactive power control and static security assessment, In an integrated fashion, a new organizational structure, called an A-team, is adopted. An A-team is well-suited to the development of computer-based, multi-agent systems for operation of large-scaled power systems. In order to verify the usefulness of the suggested scheme herein, modified IEEE 30 bus system is employed as a sample system. The results of a case study are also presented.

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A Study on the Optimal Var Planning Considering Uncertainties of Loads (부하의 불확실성을 고려한 최적 Var배분 앨고리즘에 관한 연구)

  • 송길영;이희영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.4
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    • pp.346-354
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    • 1992
  • In the power-system, the active and reactive power levels of load bus randomly vary over days, months, and years which are stochastic in nature. This paper presents an algorithm for optimal Var planning considering the uncertainties of loads. The optimization problem is solved by a stochastic linear programming technique which can handle stochastic constraints to evaluate optimal Var requirement at load bus to maintain the voltage profile which results in probabilistic density function by stochastic Load Flow analysis within admissible range. The effectiveness of the proposed algorithm has been verified by the test on the IEEE-30 bus system.

Multi-time Programmable standard CMOS ROM memory cell (여러 번 프로그래밍이 가능한 표준 CMOS 공정의 MTP (Multi-times Programmable) ROM 셀)

  • Chung, In-Young
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.455-456
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    • 2008
  • New CMOS ROM cell is reported in this paper, distinguished from conventional ones in that it can be re-programmed by multi-times. It uses the comparator offset as the physical storage quantity and the MOSFET FN stress effect for offset programming. It demands very low offset for read, and works well in very low voltage. It can become a promising ROM solution for various SoC systems.

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Study on the Security-Constrained Optimal Power Flow (상정사고를 고려한 최적조류계산 연구)

  • Choi, Kil;Won, Jong-Ryul
    • Proceedings of the KIEE Conference
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    • 2002.11b
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    • pp.381-383
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    • 2002
  • This paper proposes a MATLAB program for solving security-constrained optimal power flow using linear programming. Security-constrained optimal power flow can find an optimal generation satisfying bus voltage limits, line flow limits, reactive generation limits, even if contingency occurs. Sensitivity matrixes are obtained based on power flow solutions with and without single line contingency. This program is tested for an IEEE 14bus system with 5 generators Results shows good ability of finding optimal solution in case of a single line contingency.

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Building Blocks for Current-Mode Implementation of VLSI Fuzzy Microcontrollers

  • Huerats, J.L.;Sanchez-Solano, S.;Baturone, I.;Barriga, A.
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.929-932
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    • 1993
  • A fuzzy microcontroller is presented implementing a simplified inference mechanism. Fuzzification, rule composition and defuzzification are carried out by means of (basically) analog current-mode CMOS circuits operating in strong inversion. Also a voltage interface is provided with the external world. Combining analog and digital techniques allow a programming capability.

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A New AMOLED Pixel Circuit Employing a-Si:H TFTs for High Aperture Ratio

  • Shin, Hee-Sun;Lee, Jae-Hoon;Jung, Sang-Hoon;Kim, Chang-Yeon;Han, Min-Koo
    • Journal of Information Display
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    • v.6 no.2
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    • pp.12-15
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    • 2005
  • We propose a new pixel design for active matrix organic light emitting diode (AM-OLED) displays using hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs). The pixel circuit is composed of five TFTs and one capacitor, and employs only one additional control signal line. It is verified by SPICE simulation results that the proposed pixel compensates the threshold voltage shift of the a-Si:H TFTs and OLED.