• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.407-412
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• 1987

A large scale programmable controller is developed which adopts a multiprocessor structure. The developed programmable controller consists of the programmer, the system controller, and the input-output unit. The structure and characteristics of the system controller will be described. The PC has a special hardware scheme to solve the Boolean logic instructions of the sequence control programs. The multiprocessor structure and the special hardware enables, the real time operation and the high speed scanning which is prerequisite to the large scale, programmable controller even for many I/O points.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2327-2329
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• 1998

In this paper, an algorithm to make a configuration system for managing the I/O device of programmable logic controller(PLC) is proposed. Parallel processing architecture is used to deal with a number of I/O devices. From that architecture, a contention problem between processors can arise. To resolve this problem, the configuration system that contains informations about I/O devices is introduced. This configuration system is used to check the contention between processors in the I/O device and also used in program execution.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1756-1757
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• 2007

어느 정도 규모를 가진 실험 설비를 자동화하기 위해서 분산 I/O를 지원해 주는 자동화 컨트롤러를 사용하는 것이 편리하며 이러한 용도로 PLC(Programmable Logic Controller), PAC(Programmable Automation Controller) 등을 사용하고 있다. 하지만 기능적으로 필요로 하는 I/O 이외에 전원장치, 백프레임, 그리고 메인콘트롤러 등의 항목이 추가된다. 이러한 제한은 필요로 하는 자동화 대상인 설비의 I/O의 접점수가 많지 않지만 이들을 분산하여 설치될 필요가 있을 경우 전체 시스템을 자동화 하는데 소요되는 비용을 필요 이상으로 높이게 된다. 본 연구는 현재 한국원자력연구원에서 시험 운전 중인 TS-NBI 장치의 자동화에 이용할 목적으로 자동화 대상 설비의 I/O 접점수가 많지 않지만 분산 I/O로 구성하여야 하는 경우에 적용할 해결책을 찾기 위해서 수행 하였다.

• Journal of Broadcast Engineering
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• v.23 no.5
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• pp.606-613
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• 2018

This study is concerned with implementing an external memory expansion device for large-scale image processing. It consists of an external memory adapter card with a PCI(Peripheral Component Interconnect) Express Gen3 x8 interface mounted on a graphics workstation for image processing and an external memory board with external DDR(Dual Data Rate) memory. The connection between the memory adapter card and the external memory board is made through the optical interface. In order to access the external memory, both Programmable I/O and DMA(Direct Memory Access) methods can be used to efficiently transmit and receive image data. We implemented the result of this study using the boards equipped with Altera Stratix V FPGA(Field Programmable Gate Array) and 40G optical transceiver and the test result shows 1.6GB/s bandwidth performance.. It can handle one channel of 4K UHD(Ultra High Density) image. We will continue our study in the future for showing bandwidth of 3GB/s or more.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.752-755
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• 1997

In this paper, a scheduling algorithm is proposed for a programmable logic controller(PLC) with remote I/Os, assuming the multi-tasking facilities. Since sequence programs are executed on the application processor and I/O data are transmitted by the network processor concurrently, the proposed algorithm schedules the data transmission as well as the sequence program execution. The suggested algorithm guarantees the bounded WCRT(worst case response time), which is the one third of the WCRT in the absence of scheduling. Computer simulation shows that the algorithm can be easily applied to a real PLC without critical constraints on utilization of resources and inter-relation among tasks.

• 제어로봇시스템학회:학술대회논문집
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• 1999.10a
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• pp.61-64
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• 1999

In this paper, a technique to expand the Input and Output (I/O) of the programmable logic controller (PLC) using remote I/O module is presented. The controller and the remote I/O module should have the same protocol and are interfaced through RS 485. Each remote I/O module consists of 16 digital input and 16 digital output, and the maximum of 32 remote I/O module can be linked to one controller. The remote I/O is programmed for interrupt request to controller independently. Therefore, there is no affect to the scan time of the controller. Using this technique, the PLC can be efficiently applied to the several hundred meters different control points such as the ON-OFF control fur the agriculture farm, the building automation system, a multi group of machine control.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1016-1021
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• 2003

The overall size of electronic product is becoming small according to development of technology. Accordingly it is difficult to inspect these small components by human eyes. So, an automation system for inspecting them has been used. The existing system put microprocessor or Programmable Logic Controller (PLC) use. The structure of microprocessor-based controller and PLC use basically composed of memory devices such as ROM, RAM and I/O ports. Accordingly, the system is not only becomes complicated and enlarged but also higher price. In this paper, we implement FPGA-based One-chip Programmable Timing Controller for Inspecting Small components to resolve above problems and design the high performance controller by using VHDL. With fast development, the FPGA of high capacity that can have memory and PLL have been introduced. By using the high-capacity FPGA, the peripherals of the existent controller, such as memory, I/O ports can be implemented in one FPGA. By doing this, because the complicated system can be simplified, the noise and power dissipation problems can be minimized and it can have the advantage in price. Since the proposed controller is organized to have internal register, counter, and software routines for generating timing signals, users do not have to problem the details about timing signals and need to only send some values about an inspection system through an RS232C port. By selecting theses values appropriate for a given inspection system, desired timing signals can be generated.

• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.413-418
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• 1987

The software developed for the large scale Programmable Controller consists of the programmer's S/W, the Controller's S/W the RBC's (Remote Base Controller's) S/W and the Analog's S/W. The programmer's S/W, running on the Programmer, includes the editor, the compiler, the communication program, and some other programs for easy use. The Controller S/W, which requires the fast scanning time, consists of the BTI( Block Type Instruction) solving program, the timer service routine, the i/o update program, the communication program and etc. The RBC's S/W includes the communication program, the error recovery program and the i/o processing program. The analog S/W, controlled by the Programmer, includes the PID program. The data communication between the Programmer and the Controller the Controller and the RBC, and the RBC and the Analog are developed.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.11a
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• pp.459-460
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• 2010

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1107-1111
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• 2005

This paper presents a design of Programmable logic Controllers which are well known for a long time that can be applied to be a controller for an automatic machine in industries. However, most of them have been imported from oversea country. This research focuses on the development of PLC by KMITL staff. This PLC system is consists of CPU unit, Digital I/O RTU unit, ANALOG RTU unit. The implementation of the CPU scan time and I/O refresh are principle to PLC. In this article, there are many benefits to industries especially in order to support SME that can use local technology. Therefore, we can apply this research to the manufacturing process in Thailand for the future.