• 전력전자학회논문지
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• 제18권1호
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• pp.1-9
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• 2013

This paper proposes a ST(Switched Trans) quasi Z-source inverter using a Switched Trans Cell combing the characteristics of a Switched Inductor Cell and Trans. A DC link inductor of the conventional quasi Z-source inverter is alternated with Switched Trans Cell of the proposed ST quasi Z-source inverter. Trans Cell of the proposed method consists of one Trans and two diodes, and the proposed method has higher and more various boost function than the conventional quasi Z-source inverter by simply changing the turns ratio of primary and secondary of the Trans. The validity of the proposed ST Z-source inverter was confirmed by PSIM simulation and a DSP based experiment under the input voltage 48V and output phase voltage 30V. As a result, when compared with the traditional quasi Z-source inverter, the proposed method has the advantage of the low voltage stress under the same output voltage condition of the voltage.

• 전력전자학회논문지
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• 제27권2호
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• pp.126-133
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• 2022

This study proposes a suppression of zero sequence current (ZSC), which is caused by zero sequence voltage (ZSV) for a dual two-level inverter with single DC bus. Large output voltages enable the dual inverter with single DC bus to improve a system efficiency compared with single inverter. However, the structure of dual inverter with single DC bus inevitably generates ZSC, which reduces the system efficiency and causes a current ripple. ZSV is also produced by dead time, and its magnitude is determined by the DC bus and current direction. This study presents a novel space vector modulation method that allows the instantaneous suppression of ZSC. Based on a condition where a switching period is twice a sampling (control) period, the proposed control method is implemented by injecting the offset voltage at the primary inverter. This offset voltage is injected in half of the switching period to suppress the ZSC. Simulation and experiments are used to compare the proposed and conventional methods to determine the ZSC suppression performance.

• 한국전기전자재료학회논문지
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• 제36권6호
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• pp.614-619
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• 2023

The fault current limiting characteristics of three-phase transformer type superconducting fault current limiter (SFCL), which consisted of three-phase primary and secondary windings wound on E-I iron core, one high-TC superconducting (HTSC) element connected with the secondary winding of one phase and another HTSC element connected in parallel with other two secondary windings of two phases, were analyzed. Unlike other three-phase transformer type SFCLs with three HTSC elements, three-phase transformer type SFCL using double quench has the merit to perform fault current limiting operation for three-phase ground faults with two HTSC elements. To verify its proper three-phase ground fault current limiting operation, three-phase ground faults such as single-line ground, double-line ground and triple-line ground faults were generated in three-phase simulated power system installed with three-phase transformer type SFCL using double quench. From analysis of its fault current limiting characteristics based on tested results, three-phase transformer type SFCL using double quench was shown to be effectively operated for all three-phase ground faults.

• 한국인터넷방송통신학회논문지
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• 제15권1호
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• pp.253-259
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• 2015

우리는 이 논문에서 교류전압원의 극성에 따라서 쌍방향으로 동작하는 반도체 변압기설계를 제시한다. 변압기는 회로 사이의 유도성 결합에 의하여 에너지를 전달하는 장치이다. 대부분의 변압기는 교류 전압에 의하여 1차 및 2차 코일로 구성된 장치이다. 우리가 제시하는 시스템은 전압신호 레벨을 두 방향으로 즉, 전원에서 부하까지 전압신호가 전달되기도 하고, 부하에서 전압원까지 전달되기도 한다. 전환하는 하나의 회로로 설계되어있다. 구성한 반도체 스위치는 NPN 트랜지스터가 교류 전압원 단자에 연결되어 있고, 에너지 저장 요소로서는 이미터 단자에 연결되어 있는 인덕터를 채택하였다. 제어 신호는 반도체의 베이스 단자에 인가된다. 제시하는 시스템은 전압신호의 진폭을 가역 방향으로 변화시킬 수 있다.

• 전력전자학회논문지
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• 제11권3호
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• pp.209-215
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• 2006

본 논문에서는 전압원 인버터의 출력전압 파형을 개선하여 PWM방식을 사용할 수 없는 중 대용량급 모터드라이버 및 UPS, STATCOM, SVC등에 적용하기 위한 새로운 3상 전압원 24-스텝 인버터를 제안한다 보조회로로서 사용한 컨버터로 리플전압을 발생시키고 이를 기존의 12-스텝 인버터에 주입하는데 한대의 링크를 사용하면 12-스텝 동작이 24-스텝으로 전환되며 보조 변압기의 1차 권선을 2N(N=1,2,3...)으로 늘리면 12M-스텝(M=2,3,4..)으로 전환된다. 본 방식의 타당성을 실험 및 시뮬레이션을 통하여 입증하였다.

• 한국초전도ㆍ저온공학회논문지
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• 제5권3호
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• pp.34-37
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• 2003

A 1 MVA single-phase high temperature superconducting (HTS) transformer with BSCCO-2223 wire was designed in this paper. The rated voltages of each sides of the transformer are 22.9 kV and 6.6 kV respectively. Double pancake HTS windings arranged reciprocally will be used for the transformer windings, because of the advantages of insulation and distribution of surge voltage in case of a large power and high voltage transformer. Single HTS wire was used for the primary windings and four parallel wires were used for the secondary windings of the transformer with transposition. A core of the transformer was designed as a shell type core separated with the windings by a cryostat made of GFRP with a room temperature bore. The operating temperature of the HTS windings will be about 65K with sub-cooled liquid nitrogen. A cryogenic cooling system using a GM-cryocooler for this HTS transformer by natural convection of liquid nitrogen was designed. This type of cooling system can be a good option for compactness, efficiency, and reliability of the HTS transformer.

• 조명전기설비학회논문지
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• 제21권8호
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• pp.107-112
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• 2007

자속구속형 초전도 한류기는 1차 권선과 초전도 소자가 직렬로 연결된 2차 권선을 갖는 변압기로 구성되어 있다. 이 초전도 한류기는 결선방향에 따라 감.가극 결선으로 나누어진다. 1차 권선과 2차 권선의 인덕턴스 비에 따라 자속구속형 초전도 한류기는 사고전류의 제한특성을 제어할 수 있다. 본 논문에서는 인가전압에 따른 자속구속형 초전도 한류기의 전압 전류 특성을 분석하였다. 감 가극 결선된 자속구속형 초전도 한류기의 인가전압을 증가시켰을 때, 초기에 제한되는 전류 및 초전도 소자의 ??치 시간은 증가하였다. 초전도 소자의 회복시간은 인가전압이 증가함에 따라 증가하였다. 그러므로 자속구속형 초전도 한류기의 회복특성은 초전도 소자의 소비전력이 증가하기 때문에 초전도 소자에서 소비되는 에너지에 크게 의존한다는 것을 확인할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.184-185
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• 2006

The flux-lock type superconducting fault current limiter (SFCL) has the attractive characteristics that can adjust the current limiting level by the turns ratio between two coils. Since the recovery characteristics of a superconducting element m the flux-lock type SFCL were dependent on the turns ratio between two coils, the analysis for the recovery characteristics of this type SFCL together with the current limiting characteristic is necessary to apply it to power system. When the applied voltage and load impedance were same, the recovery time of the superconducting element was 0.32sec in case that the turn's ratio between the primary and secondary windings was 63:21. In the meantime, when the turn's ratio of secondary winding increased to 3 times, the recovery time became longer to 0.58sec.

• 전자공학회논문지
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• 제51권4호
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• pp.59-65
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• 2014

본 논문에서는 전력증폭기의 효율을 증가시키기 위해서 모드변환 가능한 단권변압기를 제안한다. 모드변환 가능한 단권변압기를 통해 전력증폭기의 저 전력 모드 동작 시 효율을 개선할 수 있다. 이 논문에서는 0.18-${\mu}m$ CMOS 표준 공정을 이용하여 듀얼모드 단권변압기를 이용한 CMOS 전력증폭기를 설계하였다. 고 전력 모드와 저 전력 모드에서 단권변압기의 1차 권선의 권선수를 조절하여 전력증폭기의 동작을 최적화하였다. EM 시뮬레이션 및 전체 회로 시뮬레이션 결과 제안된 멀티모드 CMOS 전력증폭기의 출력전력이 24dBm일 때 전력부가효율(PAE)이 10.4%에서 멀티모드 동작으로 26.1% 로 상승하여 전력증폭기의 성능 개선되었다.

• 전력전자학회논문지
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• 제18권2호
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• pp.123-130
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• 2013

This paper proposes the switched trans Z-source inverter(STZSI) which combined the characteristics of the trans Z-source inverter(TZSI) and the switched inductor Z-source inverter(SLZSI). The proposed STZSI has the same performance compared with the SLZSI which is improved the voltage boost performance of the conventional typical X-shaped ZSI, and it has advantage that circuit structure of Z-impedance network is more simple. And, in order to step up the voltage boost factor under the condition of the same duty ratio, unlike the SLZSI adding the inductors and diodes, the proposed method is dune by changing the turn ratio of trans primary winding of Z-impedance network. To confirm the validity of the proposed method, PSIM simulation and a DSP(TMS320F28335) based experiment were performed using trans with turn ratio 1 and 2 under the condition of the input DC voltage VI=50V, duty ratio D=0.1 and D=0.15. As a result, under the same input/ouput condition, the inverter arm voltage stress of the proposed method is reduced to about 15%-22% as compared with typical X-shaped ZSI, and the elements in Z-impedance network of the proposed method is reduced as compared with the SLZSI.