• Journal of Power Electronics
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• v.16 no.2
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• pp.786-797
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• 2016

This paper describes the design and development of a novel semiconductor-based solid-state switch for damped oscillating voltage test system. The proposed switch is configured as two identical series-connected switch stacks, each of which comprising 10 series-connected IGBT function units. Each unit consists of one IGBT, a gate driver, and an auxiliary voltage sharing circuit. A single switch stack can block 20 kV-rated high voltage, and two stacks in series are proven applicable to 30 kV-rated high voltage. The turn-on speed of the switch is approximately 250 ns. A flyback topology-based power supply system with a front-end power factor correction is built for the drive circuit by loosely inductively coupling each unit with a ferrite core to the primary side of a power generator to obtain the advantages of galvanic isolation and compact size. After the simulation, measurement, and estimation of the parasitic effect on the gate driver, a prototype is assembled and tested under different operating regimes. Experimental results are presented to demonstrate the performance of the developed prototype.

• Transactions on Electrical and Electronic Materials
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• v.14 no.5
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• pp.225-230
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• 2013

This paper presents a novel shunt radio frequency microelectromechanical system switch on a quartz substrate with stiff ribs around the membrane. The buckling effects in the switch membrane and stiction problem are the primary concerns with RF MEMS switches. These effects can be reduced by the proposed design approach due to the stiffness of the ribs around the membrane. A lower mass of the beam and a reduction in the squeeze film damping is achieved due to the slots and holes in the membrane, which further aid in attaining high switching speeds. The proposed switch is optimized to operate in the k-band, which results in a high isolation of -40 dB and low insertion loss of -0.047 dB at 21 GHz, with a low actuation voltage of only 14.6 V needed for the operation the switch. The membrane does not bend with this membrane design approach. Finite element modeling is used to analyze the stress and pull-in voltage.

• Korean Management Science Review
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• v.28 no.3
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• pp.15-29
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• 2011

In this paper, we consider a system working at both primary service and secondary service. A server can switch between the primary service and the secondary service or it can be assigned to secondary service as a dedicated server. A service policy is characterized by the number of servers dedicated to the secondary service and a rule for switching the remaining servers between two services. The primary service system is modelled as a Markovian queueing system and the throughput is a function of the number of servers, buffer capacity, and service policy. And the secondary service system has a service level requirement strategically determined to perform the service assigned. There is a revenue obtained from throughput and costs due to servers and buffers. We study the problem of simultaneously determining the optimal total number of servers, buffers, and service policy to maximize profit of the system subject to both an expected customer waiting time constraint of the primary service and a service level constraint of the secondary service and develop an algorithm which can be successfully applied with the small number of computations.

• Journal of the Korean Operations Research and Management Science Society
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• v.32 no.3
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• pp.17-31
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• 2007

In this paper, we consider a service system with bi-functional servers, which can switch between the primary service room and the secondary room. A service policy is characterized by the switching paints which depend on the queue length in the primary service room and the service level requirement constraint of the secondary room. The primary service room is modeled as a Markovian queueing system and the throughput of the primary service room is function of the total number of bi-functional servers. the buffer capacity of the primary service room, and the service policy. There is a revenue obtained from throughput and costs due to servers and buffers. We study the problem of simuitaneously determining the optimal number of servers, buffer capacity, and service policy to maximize profit of the service system, and develop an algorithm which can be successfully applied with the small number of computations.

• Journal of Advanced Navigation Technology
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• v.13 no.4
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• pp.509-514
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• 2009

In this paper, we designed and analyzed 256GB DRAM-based SSD storage using DDR1 memory and PCI-e interface. SSD is a storage system that uses DRAM or NAND Flash as primary storage media. Since the SSD read and write data directly to memory chips, which results in storage speeds far greater than conventional magnetic storage devices, HDD. Architecture of the proposed SSD system has performance of high speed data processing duo to use multiple RAM disks as primary storage and PCI-e interface bus as communication path of RAM disks. We constructed experimental system with UNIX, Windows/Linux server, SAN Switch, and Ethernet Switch and measured IOPS and bandwidth of proposed SSD using IOmeter. In experimental results, it has been shown that IOPS, 470,000 and bandwidth,800MB/sec of the DDR-1 SSD is better than those of the HDD and Flash-based SSD.

• Journal of Institute of Control, Robotics and Systems
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• v.12 no.11
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• pp.1130-1137
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• 2006

Relaxed Static Stability(RSS) concept has been applied to improve aerodynamic performance of modern version supersonic jet fighter aircraft. Therefore, the flight control systems are necessary to stabilizes the unstable aircraft and provides adequate handling qualities. The initial production flight control system are verified by flight test and it's always an elements of danger because of flight-critical nature of control law function and design error due to model base design method. These critical issues impact to flight safety, and it could be lead to a loss of aircraft and pilot's life. Therefore, development of an easily modifiable RFCS(Research Flight Control System) capable of reverting to a PFCS(Primary Flight Control System) of reliable control law must be developed to guarantee the flight safety. This paper addresses the concept of SSWM(Software Switching Mechanism) using the fader logic such as TFS(Transient Free Switch) based on T-50 flight control law. The result of the analysis based on non-real time simulation in-house software using SSWM reveals that the flight control system are switching between two computers without any problem.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.8
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• pp.1107-1114
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• 2012

In this paper, we propose protective coordination and automatic setting method using agents for distribution system with loop. The proposed protection scheme adopts an agent technology assuming communication among protection agents and auto-switch agents. Having exchanged fault-related information with each other, protection agents and auto-switch agents perform the primary and backup protection and fault section isolation, respectively. this proposed scheme using agents for distribution system with loop is implemented by matlab. Because of the various configuration of distribution system, It's difficult to find cooperative agents for each agent. This paper develops a program to automatically set the cooperative route for the agents.

• The Transactions of the Korea Information Processing Society
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• v.3 no.4
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• pp.947-960
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• 1996

The primary goal for developing high performance ATM switching systems is to minimized the probability of cell loss, cell delay and deterioration of throughput. ATM switching element that is the most suitable for this purpose is the shared buffer memory switch executed by common random access memory and control logic. Since it is difficult to manufacture VLIS(Very Large Scale Integrated circuit) as the number of input ports increased, the used of switching module method the realizes 32$\times$32, 150 Mb/s switch utilizing 8$\times$8, 600Mb/s os 16$\times$16, 150Mb/s unit switch is latest ATM switching technology for small and large scale. In this paper, buffer capacity satisfying total-memory-reduction effect by buffer sharing in a shared buffer memory switch are analytically evalu ated and simulated by computer with cell loss level at traffic conditions, and also features of switching network utilizing the switching module methods in small and large-capacity ATM switching system is analized. Based on this results, the structure in outline of 32$\times$32(4.9Gb/s throughput), 150Mb/s switches under research in many countries is proposed, and eventually, switching-network structure for ATM switching system of small and large and capacity satisfying with above primary goals is suggested.

• Journal of Communications and Networks
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• v.16 no.1
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• pp.56-66
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• 2014

We propose a novel opportunistic access scheme for cognitive radios in an interweave cognitive system, that considers the channel gain as well as the predicted idle channel probability (primary user occupancy: Busy/idle). In contrast to previous work where a cognitive user vacates a channel only when that channel becomes busy, the proposed scheme requires the cognitive user to switch to the channel with the next highest idle probability if the current channel's gain is below a certain threshold. We derive the threshold values that maximize the long term throughput for various primary user transition probabilities and cognitive user's relative movement.

• Progress in Superconductivity and Cryogenics
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• v.18 no.2
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• pp.18-20
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• 2016

The study of superconducting fault current limiter (SFCL) is continuously being studied as a countermeasure for reducing fault-current in the power system. When the fault occurred in the power system, the fault-current was limited by the generated impedance of SFCLs. The operational characteristics of the flux-offset type SFCL according to turn ratios between the primary and the secondary winding of a reactor were compared in this study. We connected the secondary core to a superconductor and a SCR switch in series in the suggested structure. The fault current in the primary and the secondary winding of the reactor and the voltage of the superconductor on the secondary were measured and compared. The results showed that the fault current in the load line was the lowest and the voltage applied at both ends of the superconductor was also low when the secondary winding of the reactor had lower turn ratio than the primary. It was confirmed based on these results that the turn ratio of the secondary winding of the reactor must be designed to be lower than that of the primary winding to reduce the burden of the superconductor and to lower the fault current. Also, the suggested structure could increase the duration of the limited current by limiting the continuous current after the first half cycle from the fault with the fault current limiter.