• Korean Journal of Biological Psychiatry
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• v.21 no.4
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• pp.168-174
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• 2014

Objectives Sensory gating dysfunctions in patients with schizophrenia and bipolar disorder have been investigated through two similar methods ; P50 suppression and prepulse inhibition paradigms. However, recent studies have demonstrated that the two measures are not correlated but rather constitute as distinct neural processes. Recent studies adopting spectral frequency analysis suggest that P50 suppression reflects the interaction between gamma and other frequency bands. The aim of the present study is to investigate which frequency component shows more significant interaction with gamma band. Methods A total of 108 mood disorder patients and 36 normal subjects were included in the study. The P50 responses to conditioning and test stimuli with an intra-pair interval of 500 msec were measured in the study population. According to P50 ratio (amplitude to the test stimulus/amplitude to the conditioning stimulus), the subjects with P50 ratio less than 0.2 were defined as suppressed group (SG) ; non-suppressed group (NSG) consisted of P50 ratio more than 0.8. Thirty-five and 25 subjects were included in SG and NSG, respectively. Point-to-point correlation coefficients (PPCCs) of both groups were calculated between two time-windows : the first window (S1) was defined as the time-window of one hundred millisecond after the conditioning auditory stimulus and the second window (S2) was defined as the time-window of 100 msec after the test auditory stimulus. Spectral frequency analysis was performed to investigate which frequency band results in the difference of PPCC between SG and NSG. Results Significant reduction of PPCC between S1 and S2 was observed in the SG (Pearson's r = 0.24), compared to PPCC of the NSG (r = 0.58, p < 0.05). In spectral frequency analysis, gamma band showed "phase-reset" and similar responses after the two auditory stimuli in suppressed and non-suppressed group. However in the case of alpha band, comparison showed significantly low PPCC in SG (r = -0.14) compared to NSG (r = 0.36, p < 0.05). This may be reflecting "phase-out" of alpha band against gamma band at approximately 50 msecs after the test stimulus in the SG. Conclusions Our study suggests that normal P50 suppression is caused by phase-out of alpha band against gamma band after the second auditory stimulus. Thus it is demonstrated that normal sensory gating process is constituted with attenuated alpha power, superimposed on consistent gamma response. Implications of preserved gamma and decreased alpha band in sensory gating function are discussed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.745-753
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• 2016

This paper presents a fully synthesizable low power interconnect bus for millimeter-scale wireless sensor nodes. A segmented ring bus topology minimizes the required chip real estate with low input/output pad count for ultra-small form factors. By avoiding the conventional open drain-based solution, the bus can be fully synthesizable. Low power is achieved by obviating a need for local oscillators in member nodes. Also, aggressive power gating allows low-power standby mode with only 53 gates powered on. An integrated wakeup scheme is compatible with a power management unit that has nW standby mode. A 3-module system including the bus is fabricated in a 180 nm process. The entire system consumes 8 nW in standby mode, and the bus achieves 17.5 pJ/bit/chip.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.607-608
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• 2008

Locking time of the DLL is the important design issue in case of clock gating for low power system. For precise analysis of the locking speed of the DLL, this paper analyzes the locking process of the DLL in time domain. Analysis result shows that the value of the DLL bandwidth over reference frequency should be limited to below 1 ($i.e.w_n/F_{REF}<1$) for the stable operation and relation between bandwidth and lock time is expressed by log function.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.381-384
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• 1999

In this paper, we addressed the problem of reducing the switching activity in pipeline datapath and proposed a solution. clock-gating method is a kind of practical technique for reducing switching activity in finite state machine. But, in the case that the target gated function unit has a pipeline structure, there is some spurious switching activity on each stage register group. This occur in early stage of every function enable cycle. In this paper we proposed a method to solve this problem. This method generates the enable signal to each pipeline stage to gate the clock feeding register group. Experimental results showed effective reduction of dynamic powers in pipeline circuits.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1547-1549
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• 1996

The electrical and optical switching characteristics of gold-doped silicon p-i-n diodes have been investigated. The device shows a dark switching voltage of about 500 V. The switching voltage decreases rapidly when the illumination level is increased. The differential sensitivity of optical gating over linear region is $d(V_{Th}/V_{Tho})/dP_{Ph}$=0.25/uW. The turn-on delay time and the turn-on rise time decrease with increasing optical pulse power. The turn-off delay and the fall time are negligible.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2000.11a
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• pp.94-98
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• 2000

This paper describes an application of the partial discharge measuring method in operating transformer. In the operating transformer, the useful PD signal may be superimposed by radio intereference voltage and impulse shaped noise signals generated by external corona or power electronics. In this paper, initial investigations after connecting the PD measuring system to the terminals of the measuring impedance showed a very high noise level of 3,700pC due to sinusoidal interferences. In order to reject these noises, this paper applied RIV and band-pass filters and noise gating method. The resulting measuring sensitivity was improved from 3,700pC to 160pC.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.400-402
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• 2007

This paper presents a vector control implementation for PMSM using Real Time Workshop and Embedded Target for TI C2000 DSP in MATLAB/SIMULINK. Speed, current and vector controllers are easily designed and implemented by using the MATLAB/SIMULINK program. Feedback of motor speed is processed through C28x QEP(Quadrature Encoder Pulse) block from encoder pulse. 3-Phase currents ares processed through C28x ADC block from current sensors. And gating signal of PWM inverter is generated through SVPWM and PWM block. Real-time program is drawn using SIMULINK and then converted program code for speed control of PMSM is downloaded into the TI eZdsp 2812 board. Experiments were carried out to examine validity of the proposed vector control implementation.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.3
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• pp.70-75
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• 2002

This paper proposes new single stage power factor correction (PFC) full bridge converter. The proposed converter is combined previous ZVS full bridge DC/DC converter with two inductors, two diodes, two magnetic coupling transformer for PFC. This process of power is isolated from the source and also regulate stable DC output voltage in a category. In this topology, the voltage stress of main switches is reduced by zero voltage switching. Moreover, the proposed converter doesn't need active PFC switch and auxiliarly circuits, like control and gating board, so it could decrease the size and cost and increase the efficiency.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.166-174
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• 2017

This study proposes a compensation method for the dead-time effects on a single-phase grid-connected inverter. Dead time should be considered in the pulse-width modulation gating signals to prevent the simultaneous conduction of switching devices, considering that a switching device has a finite switching time. Consequently, the output current of the grid-connected inverter contains odd-numbered harmonics because of the dead time and the nonlinear characteristics of the switching devices. The effects of dead time on output voltage and current are analyzed in this study. A new compensation algorithm based on second-order generalized integrator is also proposed to reduce the dead-time effect. Simulation and experimental results validate the effectiveness of the proposed compensation algorithm.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.4
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• pp.332-338
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• 2002

High current coil power supply for superconductivity coil of tokamak requires fast dynamics performance of di/dt and smooth change over of current direction. To meet the specification high performance DSP-based controller Is designed for 12-pulse thyristor dual converter with interphase transformer(IPT). Not only the total current of Y and $\Delta$ converter units but also the difference for those should be regulated fast and accurately. Proportional and integral controller is designed for current difference control and the controller output is compensated to $\Delta$ converter. The source voltage phase angle detection and gate pulse generation algorithm are implemented in software for higher reliability of current control. The current error Is reduced by selection of appropriate initial gating angle during the transient of change over of current direction between thyristor converters.