• Proceedings of the KIPE Conference
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• 2019.11a
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• pp.144-145
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• 2019

This paper proposes a design and analysis for a PI-IP hybrid voltage controller with a combination of PI and IP voltage controller for stable voltage control of DC bus voltage, Transient characteristic of DC bus voltage is improved by designed setting variable value and control method in the variable load and power generation conditions.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.9
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• pp.500-505
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• 2003

The target of the ULTC(Under Load Tap Changer) control purpose is to minimize the operation number of the tap of the ULTC doing the error voltage which is the difference between the measured bus voltage End the reference bus voltage of the receiving end becomes less than the tolerance limits. The existing ULTC control method controls each ULTC considering only its bus voltage of the receiving end. However, this method did not cons der the coordinated control of the ULTCs of the system. In this paper, I proposed a coordinated control of the ULTC in :he loop power system using the Jacobian matrix. To show the validity of the proposed method, I made simulations for three cases: no action of the ULTC, the control of the ULTC by the existing control method, and the control of the ULTC by the coordinated control among the ULTCs of the system. The simulation result shows that the proposed method has more improvement of the operation of the ULTC than other methods.

• Proceedings of the KIEE Conference
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• summer
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• pp.192-194
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• 2004

At present, application of PSS/E input data for power flow , stability and fault analysis consist of only 154kV and over data(except 22.9kV data). 22.9kV(5.C) Static Condenser is in operation and installation at 22.9kV Bus of 154kV Substation. however, we assume that 22.9kV 5.C install at 154kV Bus. so, we need to study and search about critical limit for 154kV Bus standard operating Voltage according to 22.9kV 5.C Modeling Site by PSS/E Ver28

• KIEE International Transactions on Power Engineering
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• v.12A no.1
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• pp.15-19
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• 2002

The power transfer capability is determined by the thermal, dynamic stability and voltage limits of the generation and transmission systems. The voltage stability depends on the reactive power limit and it affects the power transfer capability to a great extent. Then, in most load flow analysis, the reactive power limit is assumed as fixed, relatively different from the actual case. This paper proposes a method for determining the power transfer capability from a static voltage stability point of view using the IPLAN which is a high level language used with PSS/E program. The f-V curve for determining the power transfer capability is determined using Repeated Power Flow method. It Is assumed that the loads are constant and the generation powers change according to the merit order. The maximum reactive power limits are considered as varying similarly with the actual case and the effects of the varied maximum reactive power limits to the maximum power transfer capability are analyzed using a 5-bus power system and a 19-bus practical power system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.4 s.334
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• pp.9-18
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• 2005

This paper proposes the novel synchronous segmented bus architecture that has the pipeline bus architecture based on OCP(open core protocol) and the memory-oriented bus for MPEG system. The proposed architecture has bus architectures that support the memory interface for image data processing of MPEG system. Also it has the segmented hi-directional multiple bus architecture for multitasking processing by using multi -masters/multi - slave. In the scheme address of masters and slaves are fixed so that they are arranged for the location of IP cores according to operational characteristics of the system for efficient data processing. Also the bus architecture adopts synchronous segmented bus architecture for reuse of IP's and architecture or developed chips. This feature is suitable to the high performance and low power multimedia SoC systum by inherent characteristics of multitasking operation and segmented bus. Proposed bus architecture can have up to 3.7 times improvement in the effective bandwidth md up to 4 times reduction in the communication latency.

• Journal of Electrical Engineering and Technology
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• v.4 no.3
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• pp.310-314
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• 2009

This paper presents the improvement of the voltage profiles of power system networks by the inclusion of Unified Power Flow Controller (UPFC). The mathematical model of the UPFC is incorporated in the load flow algorithm and the L-index is calculated for the different values of the control parameter r $and{\gamma}$. The positioning of the UPFC device is changed to minimize the sum of the squares of the L-indices at all load buses. The test cases considered for the improvement of voltage profile with the WSCC 9-bus and IEEE 30 bus system. With the best position of UPFC along with the control parameters the improvement in voltage profile of the power system networks are obtained. The results obtained are quite encouraging compared with other techniques used to identify the best location of UPFC.

• Journal of electromagnetic engineering and science
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• v.7 no.1
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• pp.7-11
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• 2007

PCB Power-Bus (comprising power/ground planes) impedance and fields are evaluated by an efficient series expansion method that is suggested in this paper. It is used to investigate the structure's radiated emission(RE) levels and find acceptable ways of loading the power/ground planes such as decoupling capcitor(DeCap)s, balanced feeding and slits, in order to reduce the interferences. Also, the calculations and measurements of a proposed geometry are verified by vector fitting as a analysis model to check the behavior of the slit.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.12
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• pp.74-79
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• 2012

Currently, separated buses were increased to limit a fault currents in power transmission system. However, separated buses caused bad influences such as a decrease of reliability and stability. Superconducting fault current limiter (SFCL) was proposed to limit a fault current lately and that has many merits beside any other solutions. Therefore, we proposed the install of Superconducting fault current limiter (SFCL) in power transmission system with separated bus. And our proposal was verified by reliability of power system.

• 전기의세계
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• v.25 no.6
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• pp.81-88
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• 1976

The present voltage-reactive power control aims at an overall coordination of reactive power sources and voltage regulation devices to keep the bus voltages within their allowable bounds on one hand and to reduce the transmission losses on the other. This paper presents an efficient computer control scheme for the real-time control of system voltage and reactive power on the basis of a simplified linear equation by using the system characteristic constant. Computational algorithm is used for the minimization of bus voltage deviation in the first phase of optimization and for the reduction of transmission losses under the constraint of vlotage settling condition in the second phase. The numerical example for sample practical system is also given. The present study on the computer control scheme will contribute to the automation of power system operation in the near future.

• Proceedings of the KIEE Conference
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• summer
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• pp.236-238
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• 2004

In recent years wind turbine technology has undergone the rapid development in response to the demands for increased use of renewable sources of energy. Using wind turbines for production of electrical energy requires reliable operation. The increased share of wind power in electrical system makes it necessary to have grid-friendly interfaces between the wind turbines and the grid in order to maintain power quality. Increasingly wind turbines are being connected into electricity distribution system. The grid-connected wind power stations have many impacts on power systems such as voltage variations, harmonics. The paper investigates the influences of grid-connected wind power generation system on substation bus voltage.