• 제목/요약/키워드: Power-Bus

검색결과 1,397건 처리시간 0.038초

송전망 기방 환경원서의 전력기여 해석법을 이용한 송전손실 분배 (A Transmission Loss Allocation with Power Contribution Method In the Open Access Environment)

  • 송화창;이병준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 춘계학술대회 논문집 전력기술부문
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    • pp.62-64
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    • 2001
  • This paper presents a new loss allocation scheme using power contribution method Power contribution is to find how much power at each generating/1oad bus is contributed to individual load/generating bus. In this paper power contribution is calculated using fundamental circuit theory. In numerical simulation, an illustrative example applying the proposed scheme to 6-bus test system is shown.

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실계통에서의 154kV HTS-FCL Bus-Tie 최적 적용방안에 관한 연구 (A Study on the Bus-Tie Application of 154kV HTS-FCL in Korean Power System)

  • 김종율;윤재영;이승열
    • 대한전기학회논문지:전력기술부문A
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    • 제54권5호
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    • pp.226-233
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    • 2005
  • As the power demand has been increasing, a fault current problem is becoming more serious in real power system. Various ways like bus-split operation, transmission line open operation, are used in Korean power system for solving the problem. In this time, superconducting FCL(Fault Current Limiter) has been developed as a vary attractive alternative since HTS(High Temperature Superconductivity) was discovered. Korea, a project developing superconducting FCL to apply to 154kV transmission system is proceeding. Therefore, a power system analysis for SFCL application to power system is necessary, This paper presents the determination of quenching resistance and the selection of optimal cites when 154kV HTS-FCL is applied to Korean power system.

DC 전력시스템에서의 Voltage Bus Conditioner의 제어기법 비교 (The Comparison of Two Control Algorithm for a Voltage Bus Conditioner in a DC Power Distribution System)

  • 나재두;이용근
    • 전기학회논문지P
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    • 제55권1호
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    • pp.47-53
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    • 2006
  • A Voltage Bus Conditioner (VBC) is used to mitigate the voltage transients on a common power distribution bus. The VBC described here utilises inductive storage and unlike its counter part with capacitive storage, it can employ the entire stored energy towards transients' mitigation. The performances of adaptive duty ratio control and sliding mode control have been compared. The simulation results (with the package SABER) indicate that the sliding mode control results in the shortest and the smallest bus voltage excursions.

선로절환에 의한 과부화 해소 앨고리즘 (An Overload Alleviation Algorithm by Line Switching)

  • 박규홍;정재길
    • 대한전기학회논문지
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    • 제41권5호
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    • pp.459-467
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    • 1992
  • This paper presents a new algorithm for the countermeasure to alleviate the line overloads due to contingency without shedding loads in a power system. This method for relieving the line overloads by line switching is based on obtaining the kine outage distribution factors-the linear sensitivity factors, which give the amount of change in the power flow of each line due to the removal of a line in a power system. There factors are made up of the elements of sparse bus reactance matrix and brach reactances. In this paper a fast algorithm and program is presented for obtaining only the required bus reactance elements which corresponds to a non-zero elements of bus admittance matrix, and elements of columns which correspond to two terminal buses of the overloaded(monitored) line. The proposed algorithm has been validated in tests on a 6-bus and the 30-bus test system.

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신경회로망을 이용한 변전소 모선분리 방안 연구 (Application of Neural Networks to the Bus Separation in a Substation)

  • 이광호;황석영;추진부;윤용범;전동훈
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1996년도 하계학술대회 논문집 B
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    • pp.757-759
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    • 1996
  • This paper proposes an application of artificial neural networks to the bus-bar separation in a substation for radial network operation. For the effective bus-bar operation, the insecurity index of transmission line load is introduced. For the radial network operation. the constraints of bus-bar switch is formulated in the performance function with the insecurity index. The determination of bus-bar switching is to find the states of 0 or 1 in the circuit breakers. In this paper, it is tested that the bus-bar separation of binary optimization problem can be solved by Hopfield networks with adequate manipulations.

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Adaptive undervoltage protection scheme for safety bus in nuclear power plants

  • Chang, Choong-koo
    • Nuclear Engineering and Technology
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    • 제54권6호
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    • pp.2055-2061
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    • 2022
  • In the event of a short-circuit accident on a 4.16 kV non-safety bus, the voltage is temporarily lowered as backflow occurs on the safety bus. In such cases, the undervoltage relay of the safety bus shall not pick up the undervoltage so as not to interfere with the operation of the safety motors. The aim of this study is to develop an adaptive undervoltage protection scheme for the 4.16 kV safety bus considering the faults on the 13.8 kV and 4.16 kV non-safety buses connected to secondary windings of the three winding transformers, UAT and SAT. The result of this study will be the adaptive undervoltage protection scheme for the safety bus of nuclear power plants satisfying functional requirements of the safety related medium voltage motors. The adaptive undervoltage protection scheme can be implemented into an integrated digital protective relay to make user friendly and reliable protection scheme.

대전력계통의 고장해석에 관한 효추적인 계산방법에 관한 연구 (An Effective Fault Analysis Method in Large Scale Power System)

  • Jai-Kil Chung;Gi-Sig Byun
    • 대한전기학회논문지
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    • 제32권12호
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    • pp.435-440
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    • 1983
  • The methods of forming the bus impedance matrix, which is mainly employed in fault analysis of power system, can be generally classified in catagories, (1) the one being the inverse matrix of bus admittance matrix, and (2) the other the bus impedance matrix succesive formation method by particular algorithms. The former method is theouetically elegant, but the formation and inverse of complex bus admittance matrix for large power system requires too much amounts of computer memory space and computing time. The latter method also requires too much memory space. Therefore, in this paper, an algorithm and computer program is introduced for the formation of a sparse bus impedance matrix which generates only the matching terms of the admittance matrix. So, this method can reduce the computer memory and computing time, and can be applied to fault analysis of large power system by small digital computer.

On-Chip Bus Serialization Method for Low-Power Communications

  • Lee, Jae-Sung
    • ETRI Journal
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    • 제32권4호
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    • pp.540-547
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    • 2010
  • One of the critical issues in on-chip serial communications is increased power consumption. In general, serial communications tend to dissipate more energy than parallel communications due to bit multiplexing. This paper proposes a low-power bus serialization method. This encodes bus signals prior to serialization so that they are converted into signals that do not greatly increase in transition frequency when serialized. It significantly reduces the frequency by making the best use of word-to-word and bit-by-bit correlations presented in original parallel signals. The method is applied to the revision of an MPEG-4 processor, and the simulation results show that the proposed method surpasses the existing one. In addition, it is cost-effective when implemented as a hardware circuit since its algorithm is very simple.

A Novel DC Bus Voltage Balancing of Cascaded H-Bridge Converters in D-SSSC Application

  • Saradarzadeh, Mehdi;Farhangi, Shahrokh;Schanen, Jean-Luc;Frey, David;Jeannin, Pierre-Olivier
    • Journal of Power Electronics
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    • 제12권4호
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    • pp.567-577
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    • 2012
  • This paper introduces a new scheme to balance the DC bus voltages of a cascaded H-bridge converter which is used as a Distribution Static Synchronous Series Compensator (D-SSSC) in electrical distribution network. The aim of D-SSSC is to control the power flow between two feeders from different substations. As a result of different cell losses and capacitors tolerance the cells DC bus voltage can deviate from their reference values. In the proposed scheme, by individually modifying the reference PWM signal for each cell, an effective balancing procedure is derived. The new balancing procedure needs only the line current sign and is independent of the main control strategy, which controls the total DC bus voltages of cascaded H-bridge. The effect of modulation index variation on the capacitor voltage is analytically derived for the proposed strategy. The proposed method takes advantages of phase shift carrier based modulation and can be applied for a cascaded H-bridge with any number of cells. Also the system is immune to loss of one cell and the presented procedure can keep balancing between the remaining cells. Simulation studies and experimental results validate the effectiveness of the proposed method in the balancing of DC bus voltages.

저전력 미디어 버스 설계 (Design of Low-Power Media Bus)

  • 노창구;문병인;이용환
    • 한국정보통신학회논문지
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    • 제14권2호
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    • pp.437-444
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    • 2010
  • 오디오 데이터는 주로 아날로그 방식 또는 간단한 프로토콜을 이용하여 전달되었다. 그러나 디지털 멀티미디어 기기들이 발전함에 따라 하나의 기기 안에 많은 오디오 디바이스들이 집적되었고 이에 따라 연결에 사용되는 개별선들의 개수가 많아져 복잡해졌다. 기존의 $I^2S$, PCM과 같은 오디오 인터페이스는 점대점 방식을 사용하여 디바이스의 연결이 많아질수록 버스 라인의 증가와 전력 소비가 커지게 된다. 본 논문에서는 2선만을 사용한 공통 버스방식의 디지털 오디오 인터페이스를 설계하여 선의 개수를 줄었으며, 또한 전력 소모를 줄일 수 있는 클록 기어라는 방법을 사용하였다. 버스의 전력 소비를 점대점 방식과 비교한 결과 최소 3개 이상의 오디오 디바이스를 사용할 경우 30% 이상의 전력 소모 감소 효과를 갖는다