• Title/Summary/Keyword: Power-Bus

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Redundant Operation of a Parallel AC to DC Converter via a Serial Communication Bus

  • Kanthaphayao, Yutthana;Kamnarn, Uthen;Chunkag, Viboon
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.533-541
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    • 2011
  • The redundant operation of a parallel AC to DC converter via a serial communication bus is presented. The proposed system consists of three isolated CUK power factor correction modules. The controller for each converter is a dsPIC30F6010 microcontroller while a RS485 communication bus and the clock signal are used for synchronizing the data communication. The control strategy of the redundant operation relies on the communication of information among each of the modules, which communicate via a RS485 serial bus. This information is received from the communication checks of the converter module connected to the system to share the load current. Performance evaluations were conducted through experimentation on a three-module parallel-connected prototype, with a 578W load and a -48V dc output voltage. The proposed system has achieved the following: the current sharing is quite good, both the transient response and the steady state. The converter modules can perform the current sharing immediately, when a fault is found in another converter module. In addition, the transient response occurs in the system, and the output voltages are at their minimum overshoot and undershoot. Finally, the proposed system has a relatively simple implementation for the redundant operation.

An Efficient Unified Method to Compute Voltage Collapse Point (전압붕괴 임계점 계산을 위한 효율적 통합법)

  • Nam, Hae-Gon;Kim, Dong-Jun;Song, Chung-Gi;Mun, Yeong-Hwan;Kim, Tae-Gyun;Lee, Hyo-Sang
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.8
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    • pp.951-957
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    • 1999
  • The saddle node bifurcation (SNB) and the distance voltage instability are valuable information in power system planning and operation. This paper presents a new efficient, robust and unified strategy to compute the SNB by the combined use of the continuation power flow (CPF), Point of Collapse (PoC) method, and the method of a pair of multiple load flow solutions (PMLFS) with Lagrange interpolation utilizing only their advantages: the approximate nose curves and critical loading are determined fast by Lagrange-interpolating two stable and two unstable solutions obtained by using the robust CPF and PMLFS; the exact SNB is computed by the quadratically converging PoC method. The proposed method has been tested on Klos-Kerner 11-bus, New England 30-bus, IEEE 118-bus and KEPCO 791-bus systems. The method is found to be so efficient that computation time for determining the SNB of the KEPCO 791-bus system is 17.82 sec by a notebook PC with 300 MHz Pentium processor.

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Comparison of Fault Current Limiting Characteristics According to Facility in Power System (전력계통의 사고전류 저감 설비별 특성 비교)

  • Park, Hyoung-Min;Choi, Hyo-Sang;Cho, Yong-Sun;Lim, Sung-Hun;Hwang, Jong-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.05b
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    • pp.127-129
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    • 2005
  • We investigated the fault current limiting characteristics according to the various facilities in power system. Power systems are becoming larger and larger for meeting electric power demand. Therefore, the over-currents resulting from contingencies such as short circuits are increasing higher, which causes the ratings of circuit breakers(CBs) to increase. Upgrading or replacement of CBs is not difficult from the technical and economical point of view. Bus split is being adopted into a part of 154 kV power systems, but it has adverse effects such as overload to neighboring power systems, increased voltage fluctuation, and decreased power system stability. For 345 kV power systems, the bus split measure is not feasible and dc reactors are being suggested. The superconducting fault current limiter is a protection gear of new concept that limits fault current automatically in a few milliseconds. It can also provide the effect of CB capacity increase, relaxation of power machine criteria, enhancement in power system reliability, and flexible power system operation.

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Reactive Power Traceable System based Vulnerable Areas Detection for Reactive Power (무효전력 흐름 추적을 이용한 무효전력 취약지역 판단)

  • Choi, YunHyuk;Bae, MoonSung;Lee, Byongjun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.8
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    • pp.1145-1153
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    • 2015
  • The paper analyzes reactive power flow characteristic in power system by reactive power tracing. In addition, virtual buses are inserted in the algorithm to consider losses of transmission lines, and shunt capacitor treated as a reactive power generator. The results of simulation are analyzed by two points of view. The one is load’s point of view and another is generator’s point of view. Classic purpose of the reactive power tracing consists in the reactive power pricing. However, it is significantly used to select vulnerable area about line outage in this paper. To find the vulnerable area, reactive power tracing variations between pre-contingency and post-contingency are calculated at all load buses. In heavily load area, buses which has highest variation become the most vulnerable bus. This method is applied to the IEEE 39-bus system. It is compared with voltage variation result and VQ-margin to verify its effect.

Design of a Small-Area, Low-Power, and High-Speed 128-KBit EEPROM IP for Touch-Screen Controllers (터치스크린 컨트롤러용 저면적, 저전력, 고속 128Kb EEPROMIP 설계)

  • Cho, Gyu-Sam;Kim, Doo-Hwi;Jang, Ji-Hye;Lee, Jung-Hwan;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2633-2640
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    • 2009
  • We design a small-area, low-power, and high-speed EEPROM for touch screen controller IC. As a small-area EEPROM design, a SSTC (side-wall selective transistor) cell is proposed, and high-voltage switching circuits repeated in the EEPROM core circuit are optimized. A digital data-bus sensing amplifier circuit is proposed as a low-power technology. For high speed, the distributed data-bus scheme is applied, and the driving voltage for both the EEPROM cell and the high-voltage switching circuits uses VDDP (=3.3V) which is higher than the logic voltage, VDD (=1.8V), using a dual power supply. The layout size of the designed 128-KBit EEPROMIP is $662.31{\mu}m{\times}1314.89{\mu}m$.

A new power-stage design and analysis to modularize power regulator of the KOrea Multi-Purpose SATellite (다목적 실용위성 전력조절기 모듈화 구현을 위한 새로운 전원단 설계 및 해석)

  • 박성우;이재승;이종인;윤정오
    • Journal of Korea Society of Industrial Information Systems
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    • v.8 no.2
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    • pp.84-91
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    • 2003
  • KOMPSAT series use software-controlled unregulated bus system in which the main bus is directly connected to a battery and the duty-ratio for PWM switch is controlled by the on-board satellite software. This paper proposes a new power-stage circuit that can be available for modularization of the power regulator which is used at the software-controlled unregulated bus system satellite. And we analyze the proposed power-stage operation according to its operating modes and verify it by performing software simulation and hardware experiment using prototype. We construct a parallel-module converter which is composed of proposed power-stages and perform experiment to verify modular characteristics of the proposed power-stage. Finally, we verify the usefulness of the proposed power-stage by comparing above results with those of a parallel-module converter made of conventional power-stages.

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The Improvement Method of Transfer Noise by Power Islands Resonace (Power Islands의 공진에 의한 잡음 전달 개선 방법)

  • 이신영;권덕규;이해영
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.1
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    • pp.13-18
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    • 2003
  • In this paper, we researched on the improved method for transferring noise which is generated from power island. In general case, the power island has a drawback where the noise transfer increase because of the structural resonance in each power bus. Thus, this paper suggests two improved methods that reduces the noise transfer. First method is to suppress the structural resonance by varying the source of the noise. The second method is to utilize the EGI in order to minimize the EGI in order to minimize the transfer of the noise when the resonance occurs. The simulation analysis shows that the relocation of the noise source dramatically minimized the resonance in power bus and the utilization of EGI has effectively reduced the noise transfer.

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Automatic Suppression of Power System Overload (전력계통과부하 자동예방법에 관한 연구)

  • 박영문;양흥석;문영현
    • 전기의세계
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    • v.27 no.1
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    • pp.56-63
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    • 1978
  • A new method is suggested for the bus active power vs. line power flow sensibility bector, applying the Optimally-Ordered Triangular Factorization Technique, and new algorithms are derived for the optimum measures against overloaded lines and transformers resulting from contingency analysis. According to the algorithms an online-purpose FORTRAN computer program package is developed and tested or the actual 48-bus, 91-line power system with good results.

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Study on the Security-Constrained Optimal Power Flow (상정사고를 고려한 최적조류계산 연구)

  • Choi, Kil;Won, Jong-Ryul
    • Proceedings of the KIEE Conference
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    • 2002.11b
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    • pp.381-383
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    • 2002
  • This paper proposes a MATLAB program for solving security-constrained optimal power flow using linear programming. Security-constrained optimal power flow can find an optimal generation satisfying bus voltage limits, line flow limits, reactive generation limits, even if contingency occurs. Sensitivity matrixes are obtained based on power flow solutions with and without single line contingency. This program is tested for an IEEE 14bus system with 5 generators Results shows good ability of finding optimal solution in case of a single line contingency.

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Active/Reactive Compound Compensation in Distribution System

  • Sul, Yong-Tae
    • Journal of Electrical Engineering and information Science
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    • v.2 no.4
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    • pp.46-52
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    • 1997
  • In this paper th use of compensation based on a combination of active plus reactive power at distribution model system is proposed. The basic voltage-power relationships for the linearized case on an infinite bus are used and the compensation angle is defined based on the voltage magnitude response to small power injection. Compensation is supplied at several locations, and the system is subjected to varying fault scenarios, with its response observed under different system conditions. As number of control issues for a storage-based active/reactive power compensator as a bus voltage regulator are explored to compare the effectiveness of active/reactive again reactive-only compensation.

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