• Journal of the Semiconductor & Display Technology
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• v.15 no.4
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• pp.22-26
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• 2016

In this paper, we measured the efficiency of the receiver for 5.8GHz Microwave Smartphone Charging. We have designed and fabricated 1W and 2W power amplifier, respectively. A 1W power amplifier used a TC3531 power device of TRANSCOM Inc. In addition, a 2W power amplifier using the two TC3531 devices was constructed with divider and combiner. We used the Wilkinson divider theory for divider and combiner. The voltage was measured using the 1W and 2W power amplifier and integrated receivers to the distance of 50cm.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.123-128
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• 2019

Currently mobile services are on the verge of full commercialization ahead of 5G mobile communication (5G). The first goal could be to preempt the 5G market through realistic media services utilizing VR (Virtual Reality) and AR (Augmented Reality) technologies that users can most easily experience. Basically this movement is based on the advanced development of smart devices and high quality graphics processing computing power of mobile application processors. Accordingly, the importance of mobile GPUs is emerging and the most concern issue becomes a model for predicting the power and performance for smooth operation of high quality mobile contents. In many cases, the performance of mobile GPUs has been introduced in terms of power consumption of mobile GPUs using dynamic voltage and frequency scaling and throttling functions for power consumption and heat management. This paper introduces several studies of mobile GPU performance prediction model with user-friendly methods not like conventional power centric performance prediction models.

• Journal of the Optical Society of Korea
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• v.5 no.1
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• pp.5-8
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• 2001

In this work, we studied the effect of chirped grating on optical bistability in λ/4-shifted semiconductor distributed-feedback(DFB) devices, such as an etalon with nonlinear mirrors, a λ/4-shifted DFB waveguide and aλ/4-shifted DFB laser amplifier. We found that chirped DFB devices exhibit bistable switching at a lower input power.OCIS code : 050.2770, 190.1450, 190.5970, 230.0230.

• Journal of IKEEE
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• v.22 no.2
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• pp.427-431
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• 2018

This research was worked about $Ga_2O_3$ Epi wafer that was one of the mose wide band gap semiconductors to be used power semiconductor industry. This wafer was grown $5.3{\mu}m$ thickness on Sn doped $Ga_2O_3$ Substrate by HVPE(Hydride Vapor Phase Epitaxy). Generally, we can fabricate 600V class power semiconductor devices when the thickness of compoound power semiconductor is $5{\mu}m$. but in case of $Ga_2O_3$ Epi wafer, we can obtain over 1000V class. As a result of J-V measurment of the grown $Ga_2O_3$ Epi wafer, we obtain $2.9-7.7m{\Omega}{\cdot}cm^2$ on resistance. Specially, in case of reverse, we comfirmed a little leakage current when the reverse voltage is over 200V.

• ETRI Journal
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• v.29 no.5
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• pp.633-640
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• 2007

We report an experimental demonstration of 40 Gbps all-optical 3R regeneration with all-optical clock recovery based on InP semiconductor devices. We also obtain alloptical non-return-to-zero to return-to-zero (NRZ-to-RZ) format conversion using the recovered clock signal at 10 Gbps and 40 Gbps. It leads to a good performance using a Mach-Zehnder interferometric wavelength converter and a self-pulsating laser diode (LD). The self-pulsating LD serves a recovered clock, which has an rms timing jitter as low as sub-picosecond. In the case of 3R regeneration of RZ data, we achieve a 1.0 dB power penalty at $10^{-9}$ BER after demultiplexing 40 Gbps to 10 Gbps with an eletroabsorption modulator. The regenerated 3R data shows stable error-free operation with no BER floor for all channels. The combination of these functional devices provides all-optical 3R regeneration with NRZ-to-RZ conversion.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.4
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• pp.257-265
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• 2009

Recent progress in development of CMOS power amplifiers for mobile terminals is reviewed, focusing first on switching mode power amplifiers, which are used for transmitters with constant envelope modulation and polar transmitters. Then, various transmission line transformers are evaluated. Finally, linear power amplifiers, and linearization techniques, are discussed. Although CMOS devices are less linear than other devices, additional functions can be easily integrated with CMOS power amplifiersin the same IC. Therefore, CMOS power amplifiers are expected to have potential applications after various linearity and efficiency enhancement techniques are used.

• Electronics and Telecommunications Trends
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• v.38 no.1
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• pp.36-45
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• 2023

The increasing demand for ultra-high efficiency of compact power conversion systems for electric vehicle applications has brought GaN power semiconductors to the fore due to their low conduction losses and fast switching speed. In particular, the development of materials and core device processes contributed to remarkable results regarding the publication of vertical GaN power devices with high breakdown voltage. This paper reviews recent advances on GaN material technology and vertical GaN power device technology. The GaN material technology covers the latest technological trends and GaN epitaxial growth technology, while the vertical GaN power device technology examines diodes, Trench FETs, JFETs, and FinFETs and reviews the vertical GaN PiN diode technology developed by ETRI.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.464-466
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• 1996

IGBT devices have the best features of both power MOSFETs and power bipolar transistors, i.e., efficient voltage gate drive requirements and high current density capability. When designing circuit and systems that utilize IGSTs or other power semiconductor devices, circuit simulations are needed to examine how the devices affect the behavior of the circuit. The IGBT model in this paper is verified by comparing the results of the model with experimented results for various circuit operating conditions. The model performs well and describes experimented results accurately for the range of static and dynamic condition in which the device is intended to be operated.

• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.118-123
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• 2020

In this paper, the design method of asynchronous nonvolatile memory module that can efficiently process and store large amounts of data without loss when the power turned off is proposed and implemented. PSRAM, which takes advantage of DRAM and SRAM, was used for data processing, and NAND flash memory was used for data storage and backup. The problem of a lot of signal interference due to the characteristics of memory devices was solved through PCB design using high-density integration technology. In addition, a boost circuit using the super capacitor of 0.47F was designed to supply sufficient power to the system during the time to back up data when the power is off. As a result, an asynchronous nonvolatile memory module was designed and implemented that guarantees reliability and stability and can semi-permanently store data for about 10 years. The proposed method solved the problem of frequent data loss in industrial sites and presented the possibility of commercialization by providing convenience to users and managers.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.85-91
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• 2012

In this paper, the large data processing and suitable FAT32 file system for industrial system using a PLC and CF memory was implemented. Most of PLC can't save the large data in user data memory. So it's required to the external devices of CF memory or NAND flash memory. The CF memory is used in order to save the large data of PLC system. The file system using the CF memory is NTFS, FAT, and FAT32 system to configure in various ways. Typically, the file system which is widely used in industrial data storage has been implemented as modified FAT32. The conventional FAT 32 file system was not possible for multiple writing and high speed data accessing. The proposed file system was implemented by the large data processing module can be handled that the files are copied at the 40 bytes for 1msec speed logging and creating 8 files at the same time. In a sudden power failure, high reliability was obtained that the problem was solved using a power fail monitor and the non-volatile random-access memory (NVSRAM). The implemented large data processing system was applied the modified file system as FAT32 and the good performance and high reliability was showed.