• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.4
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• pp.568-576
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• 2017

This paper presents a clock and data recovery circuit with an adaptive loop bandwidth calibration scheme and the idle power saved frequency acquisition. The loop bandwidth calibration adaptively controls injection currents of the main loop with a trimmable bandgap reference circuit and trains the VCO to operate in the linear frequency control range. For stand-by power reduction of the phase detector, a clock gating circuit blocks 8-phase clock signals from the VCO and cuts off the current paths of current mode D-flip flops and latches during the frequency acquisition. 77.96% reduction has been accomplished in idle power consumption of the phase detector. In the jitter experiment, the proposed scheme reduces the jitter tolerance variation from 0.45-UI to 0.2-UI at 1-MHz as compared with the conventional circuit.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.365-366
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• 2016

This paper presents a single-phase transformerless photovoltaic (PV) power converter systems based on the AC/DC boost inverter, which is capable of solving the leakage current and second-order ripple power issues. By eliminating the inherent ripple power in single-phase inverter, the bulky electrolytic capacitor can be replaced by a small film capacitor. The validity of the proposed scheme has been verified by the simulation results.

• 전기의세계
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• v.25 no.6
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• pp.81-88
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• 1976

The present voltage-reactive power control aims at an overall coordination of reactive power sources and voltage regulation devices to keep the bus voltages within their allowable bounds on one hand and to reduce the transmission losses on the other. This paper presents an efficient computer control scheme for the real-time control of system voltage and reactive power on the basis of a simplified linear equation by using the system characteristic constant. Computational algorithm is used for the minimization of bus voltage deviation in the first phase of optimization and for the reduction of transmission losses under the constraint of vlotage settling condition in the second phase. The numerical example for sample practical system is also given. The present study on the computer control scheme will contribute to the automation of power system operation in the near future.

• 전기의세계
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• v.31 no.5
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• pp.375-382
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• 1982

The optimum control of voltage and reactive power in large system requires large amounts of complicated calculation. If the large power system is controlled by the centralized control scheme, the necessary computing time, memory requirments and data transmission channels increase exponetially, and computer control of the system becomes difficult. Piecewise method which aims at the reduction of the difficulties of centralized control scheme is to decompose a large power system into several subsystems, each of which is controlled by a local computer and the control efforts of each subsystem are coordinated by a central computer. Unless sufficient coordination is made between subsystems, the control quality may become very poor. This paper describes how piecewise method can be applied in the optimal control of voltage and reactive power in large system, and presents effective calaulating algorithm for the solution of the problem. The numerical example for model system is presented here.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.276-280
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• 1998

This paper proposes a harmonic a harmonic reduction technique of the parallel-connected twelve-pulse thyristor rectifiers. The proposed system is an improvement over the diode rectifier system with an active interphase reactor [2]. In this scheme, a low KVA (0.15 Po (PU) ) active current source injects a triangular current into an interphase reactor of a twelve-pulse thyristor rectifier along the phase delay angle. The current injection results in near sinusoidal input current with less than 1% THD. Detailed analysis of the proposed scheme along scheme along with design equations is illustrated. Simulation results verify the concept.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1250-1252
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• 2003

This Paper presents Sigma-Delta Modulation(SDM) schemes to generate switching waveform for a high-power factor boost-type rectifier. The SDM scheme can be implemented by simple digital algorithm unlike conventional PWM schemes with several hardware, and has the characteristics of spectrum-spreading and noise-shaping effects, which are profitable in harmonic reduction of input current in the boost-type rectifier. The comparison results of their spectrum performances shows that the 1st-order SDM has better harmonic suppression effect than conventional PWM scheme and Dithered SDM scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.2C
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• pp.174-180
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• 2007

In the tone reservation (TR) scheme, it is known that the set of randomly selected peak reduction tones (PRT's) performs better than the contiguous PRT set and the interleaved PRT set in the PAPR reduction of orthogonal frequency division multiplexing (OFDM). It is also known that finding the optimal PRT set corresponds to the secondary peak minimization problem in the TR scheme. However, the problem cannot be solved for the practical number of tones since it is NP-hard. In this paper, a new search algorithm for the near optimal PRT set is proposed based on the fact that the secondary peak value of the PRT set statistically tends to decrease asthe variance of the PRT set decreases.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.12
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• pp.117-126
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• 2005

In this paper, we present a new method for the reduction of the PAPR (peak to average power ratio) of OFDM signals. The idea behind the proposed method is that IFFT is implemented often with software for a digital signal processor such that we may avoid the repeated calculations to reduce the computational operations: we define sub-sequences in the IFFT process and then multiply the optimum phase rotation factors to them to minimize the PAPR. The PAPR reduction performance of the proposed method is equal to that of the interleaved partition scheme of the PTS (partial transmit sequence) method with only 1/3 computational operations of it.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.51-54
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• 2005

Generator efficiency optimization is important for economic saving and environmental pollution reduction. In general, the machine loss can be reduced by the decreasing the flux level, resulting in the significant reduction of the core loss. This paper proposesan model-based controller is used to decrement the excitation current component on the basis of measured stator current and machine parameters and the q-axis current component controls the generator torque, by which the speed of the induction generator iscontrolled according to the variation of the wind speed in order to produce the maximum output power. The generator reference speed is adjusted according to the optimum tip-speed ratio. The generated power flows into the utility grid through the back-to-back PWM converter. The grid-side converter controls the dc link voltage and the line-side power factor by the q-axis and the d-axis current control, respectively. Experimental results are shown to verify the validity of the proposed scheme.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.12
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• pp.608-615
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• 2003

This paper describes an implementation of a DSP (Digital Signal Processor) controlled random carrier frequency modulation for the PWM inverter for acoustic noise reduction of induction motors. Real-time generation of the random variable and RPWM(Random PWM) along with the speed control was achieved by DSP TMS320C31. The experimental results show that the voltage and current harmonics are spread to a wide band area and the power spectrum of the acoustic switching noise was spread to create a more appealing, less annoying sound. Also, the speed response of the implemented method and the conventional method is nearly similar to each other from the viewpoint of the v/f constant control.