• Title/Summary/Keyword: Power electronic

Search Result 7,850, Processing Time 0.03 seconds

Evaluation of Load Rejection to House Load Test at 50% Power for UCN 3

  • Lee, Chang-Gyun;Suk whun Sohn;Sohn, Jong-Joo;Seo, Jong-Tae;Lee, Sang-Keun;Kim, Youngsung;Nam, Kyu-Won;Jung, Yang-Mook;Chae, Kyeong-Sik
    • Proceedings of the Korean Nuclear Society Conference
    • /
    • 1998.05a
    • /
    • pp.398-403
    • /
    • 1998
  • The Load Rejection to House Load test at 50% power was successfully peformed during the UCN 3 PAT period. In this test, all plant control systems automatically controlled the plant from 50% power to house load operation mode. The KISPAC code, which was used in the performance analysis during the design process of UCN 3&4, predictions of the test agreed with the measured data demonstrating the validity of the code as well as the completeness of the plant design.

  • PDF

Estimation of Transferred Power from a Noise Source to an IC with Forwarded Power Characteristics

  • Pu, Bo;Kim, Taeho;Kim, SungJun;Kim, Jong-Hyeon;Kim, SoYoung;Nah, Wansoo
    • Journal of electromagnetic engineering and science
    • /
    • v.13 no.4
    • /
    • pp.233-239
    • /
    • 2013
  • This paper proposes an accurate approach for predicting transferred power from a noise source to integrated circuits based on the characteristics of the power transfer network. A power delivery trace on a package and a printed circuit board are designed to transmit power from an external source to integrated circuits. The power is demonstrated between an injection terminal on the edge of the printed circuit board and integrated circuits, and the power transfer function of the power distribution network is derived. A two-tier calibration is applied to the test, and scattering parameters of the network are measured for the calculation of the power transfer function. After testing to obtain the indispensable parameters, the real received and tolerable power of the integrated circuits can be easily achieved. Our proposed estimation method is an enhancement of the existing the International Electrotechnical Commission standard for precise prediction of the electromagnetic immunity of integrated circuits.

Cost-effective Power System with an Electronic Double Layer Capacitor for Reducing the Standby Power Consumption of Consumer Electronic Devices

  • Park, Kyung-Hwa;Yi, Kang-Hyun
    • Journal of Power Electronics
    • /
    • v.13 no.3
    • /
    • pp.362-368
    • /
    • 2013
  • Commercial home appliances using remotely controlled systems consume electric power while in standby mode to prepare for receiving a remote turn-on signal. The proposed power system can significantly reduce standby power consumption without increasing cost. Furthermore, since a Electronic Double Layer Capacitor (EDLC) is used as an auxiliary power storage element, the life cycle is longer and system reliability can be better than with existing approaches. When the energy of the EDLC is not sufficient for turning on the appliance, the power system charges the EDLC without affecting the main system. The proposed power system is verified with a commercial LCD TV and a 3.93mW standby consumption is obtained. This standby consumption can be regarded as zero standby equipment according to the IEC-62031 standard.

A Noncoherent UWB Communication System for Low Power Applications

  • Yang, Suck-Chel;Park, Jung-Wan;Moon, Yong;Lee, Won-Cheol;Shin, Yo-An
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.4 no.3
    • /
    • pp.210-216
    • /
    • 2004
  • In this paper, we propose a noncoherent On-Off Keying (OOK) Ultra Wide Band (UWB) system based on power detection with noise power calibration for low power applications. The proposed UWB system achieves good bit error rate performance which is favorably comparable to that of the system using the ideal adaptive threshold, while maintaining simple receiver structure, In addition, low power Analog Front-End (AFE) blocks for the proposed noncoherent UWB transceiver are proposed and verified using CMOS technology. Simulation results on the pulse generator, delay time generator and 1-bit Analog-to-Digital (AID) converter show feasibility of the proposed UWB AFE system.

Electronic Ballast for HPS Lamps with Intrinsic Power Regulation over Lamp Life

  • Dehghani, Majid;Saghaiannejad, Seid Mortaza;Karshenas, Hamid Reza
    • Journal of Power Electronics
    • /
    • v.9 no.4
    • /
    • pp.526-534
    • /
    • 2009
  • This paper introduces the electronic ballast for high pressure sodium (HPS) lamps which provides power regulation during the whole lamp life without using a closed-loop power control system, in spite of large variations of lamp characteristics resulting from lamp aging. The structure of the electronic ballast and the parameters of HPS lamps are described. A mathematical model for the ballast is developed and used for the design and analysis of the ballast. A design procedure is presented to design the ballast which provides intrinsic power regulation over the whole lamp life. To improve the technical specifications of the ballast, the practical and standard constraints are considered in the design. According to the design procedure, an electronic ballast for 250-W HPS lamps is designed. All theoretical analyses are verified with the help of a semi-industrial experimental setup. The results validate that the designed ballast provides power regulation during the whole lamp life.

Single-Stage Half-Bridge Electronic Ballast Using a Single Coupled Inductor

  • Cho, Yong-Won;Kwon, Bong-Hwan
    • Journal of Power Electronics
    • /
    • v.12 no.5
    • /
    • pp.699-707
    • /
    • 2012
  • This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

STATCOM Helps to Guarantee a Stable System

  • Andersen, B.R;Gemmell, B.D.;Horwill, C.;Hanson, D.J.
    • Journal of Power Electronics
    • /
    • v.1 no.2
    • /
    • pp.65-70
    • /
    • 2001
  • Transmission System Operators are governed by operational security standards that are applied in real time. During system disturbances, the System Operators must rely on the installed protection and control equipment, prior to human intervention. New power electronic solutions bring rapid and repeatable responses to disturbances, which will help System Operators to guarantee a stable system. Last year, Alstom completed the world's first competitively bid STATCOM to support the voltage on National Grid's 400kV network that supplies London and the Southeast from the north of the UK. It is rated ${\pm}75MVAr$ and forms part of a Static Var System (SVS) with a total rating of 0 to 225MVAr. This paper will describe the reasons for its size, location, its chain-link configuration and give examples of its operating performance. The paper will also describe the features that allow this STATCOM to deliver much more than reactive compensation in support of a wider transmission service objective, as system conditions require.

  • PDF

A Study on the Development of Abnormal Power Source Generator to Evaluate Electronic Appliances (시험용 이상전원(異狀電源) 발생장치의 개발에 관한 연구)

  • Park, Chan-Won;Rho, Jea-Kwan
    • Journal of Industrial Technology
    • /
    • v.24 no.A
    • /
    • pp.83-90
    • /
    • 2004
  • Generally, electronic appliances are used on the basis of normal power source supply. The power source inevitably includes the abnormal condition, such as, sudden voltage sagging, power interrupt, and induced noises. As the electronic appliances which include micro-controller-based circuits are being increased recently, the controller circuit sometimes malfunctions by the abnormal condition of the power source. This situation causes serious problems such as hitch of electric appliance, fire and medical instrument glitch, which produces serious situations. In this paper, development of power interrupt tester which is highly suitable for an endurance test device under abnormal power source to microprocessor-based circuits is proposed 89C2051 microcontroller is performed to make power interrupt signal, and software controls peripheral hardwares and built-in functions. Experimental results of this study will offer a good application to electronic appliance maker as a test device of hardware and software debugging use.

  • PDF

2.6 GHz GaN-HEMT Power Amplifier MMIC for LTE Small-Cell Applications

  • Lim, Wonseob;Lee, Hwiseob;Kang, Hyunuk;Lee, Wooseok;Lee, Kang-Yoon;Hwang, Keum Cheol;Yang, Youngoo;Park, Cheon-Seok
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.3
    • /
    • pp.339-345
    • /
    • 2016
  • This paper presents a two-stage power amplifier MMIC using a $0.4{\mu}m$ GaN-HEMT process. The two-stage structure provides high gain and compact circuit size using an integrated inter-stage matching network. The size and loss of the inter-stage matching network can be reduced by including bond wires as part of the matching network. The two-stage power amplifier MMIC was fabricated with a chip size of $2.0{\times}1.9mm^2$ and was mounted on a $4{\times}4$ QFN carrier for evaluation. Using a downlink LTE signal with a PAPR of 6.5 dB and a channel bandwidth of 10 MHz for the 2.6 GHz band, the power amplifier MMIC exhibited a gain of 30 dB, a drain efficiency of 32%, and an ACLR of -31.4 dBc at an average output power of 36 dBm. Using two power amplifier MMICs for the carrier and peaking amplifiers, a Doherty power amplifier was designed and implemented. At a 6 dB back-off output power level of 39 dBm, a gain of 24.7 dB and a drain efficiency of 43.5% were achieved.