• Journal of Radiation Protection and Research
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• 제48권3호
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• pp.124-130
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• 2023

Background: When bipolar junction transistors (BJTs) are used as switches, their switching characteristics can be deteriorated because the recombination time of the minority carriers is long during turn-off transient. When BJTs operate as low frequency switches, the power dissipation in the on-state is large. However, when BJTs operate as high frequency switches, the power dissipation during switching transients increases rapidly. Materials and Methods: When silicon (Si) BJTs are irradiated by fast neutrons, defects occur in the Si bulk, shortening the lifetime of the minority carriers. Fast neutron irradiation mainly creates displacement damage in the Si bulk rather than a total ionization dose effect. Defects caused by fast neutron irradiation shorten the lifetime of minority carriers of BJTs. Furthermore, these defects change the switching characteristics of BJTs. Results and Discussion: In this study, experimental results on the switching characteristics of a pnp Si BJT before and after fast neutron irradiation are presented. The results show that the switching characteristics are improved by fast neutron irradiation, but power dissipation in the on-state is large when the fast neutrons are irradiated excessively. Conclusion: The switching characteristics of a pnp Si BJT were improved by fast neutron irradiation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권1호
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• pp.91-105
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• 2016

Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

• Journal of electromagnetic engineering and science
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• 제17권2호
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• pp.105-107
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• 2017

The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

• 전기전자학회논문지
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• 제16권3호
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• pp.265-273
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• 2012

Data stability and leakage power dissipation have become a critical issue in scaled SRAM design. In this paper, an advanced 8T SRAM cell improving the read and write stability of data storage elements as well as reducing the leakage current in the idle mode is presented. During the read operation, the bit-cell keeps the noise-vulnerable data 'low' node voltage close to the ground level, and thus producing near-ideal voltage transfer characteristics essential for robust read functionality. In the write operation, a negative bias on the cell facilitates to change the contents of the bit. Unlike the conventional 6T cell, there is no conflicting read and write requirement on sizing the transistors. In the standby mode, the built-in stacked device in the 8T cell reduces the leakage current significantly. The 8T SRAM cell implemented in a 130 nm CMOS technology demonstrates almost 100 % higher read stability while bearing 20 % better write-ability at 1.2 V typical condition, and a reduction by 45 % in leakage power consumption compared to the standard 6T cell. The stability enhancement and leakage power reduction provided with the proposed bit-cell are confirmed under process, voltage and temperature variations.

• The Korean Journal of Ceramics
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• 제3권2호
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• pp.92-95
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• 1997

Because of the novel characteristics such as chemical stability, hardness, electrical resistivity and thermal conductivity, diamond-like carbon (DLC) film is a suitable material for the passivation layers. For this purpose, using the PECVD, DLC films were synthesized at room temperature. The adhesion and the hardness of the DLC films deposited on Si an SiO2 substrate were measured. The resistivity of 5.3$\times$$10^8$$\Omega$.cm was measured by automatic spreading resistance probe analysis method. The thermal conductivities of different DLC films were measured and compared with that of phospho silicate glass (PSG) film which is commonly used as passivation layers. The thermal conductivity of DLC film was improved by increasing hydrogen flow rate up to 90 sccm and was better than that of PSG film. The patterning techniques of the DLC film developed using the RIE and the lift-off method to form 5$\mu\textrm{m}$ line. Finally, the thermal characteristics of the power transistor with the DLC film as passiviation layer was analyzed.

• 대한전자공학회논문지SD
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• 제48권3호
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• pp.1-6
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• 2011

N-channel 산화물 박막 트랜지스터(Thin Film Transistor, 이하 TFT)만을 이용한 저소비전력 inverter, NAND, NOR의 논리 게이트 회로를 제안한다. 제안된 회로는 asymmetric feed-through와 bootstrapping을 이용해서 pull-up, pull-down 스위치가 동시에 켜지지 않도록 설계하였다. 그 결과로 출력신호 전압 범위가 입력신호 전압과 동일하고 정전류가 흐르지 않는다. 인버터는 5 개의 TFT와 2 개의 capacitor로, NAND 및 NOR 게이트는 각각 10 개의 TFT와 4 개의 capacitor로 구성된다. 산화물 TFT 모델을 사용하여 SPICE 시뮬레이션을 수행하여 제안된 회로의 동작을 성공적으로 검증하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.281-286
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• 2007

In this paper, sub-circuits for 24 GHz phase locked 100ps(PLLs) using $0.5{\mu}m$ SiGe HBT are presented. They are 24 Ghz voltage controlled oscillator(VCO), 24 GHz to 12 GHz regenerative frequency divider(RFD) and 12 GHz to 1.5 GHz static frequency divider. $0.5{\mu}m$ SiGe HBT technology, which offers transistors with 90 GHz fMAX and 3 aluminum metal layers, is employed. The 24 GHz VCO employed series feedback topology for high frequency operation and showed -1.8 to -3.8 dBm output power within tuning range from 23.2 GHz to 26 GHz. The 24 GHz to 12 GHz RFD, based on Gilbert cell mixer, showed 1.2 GHz bandwidth around 24 GHz under 2 dBm input and consumes 44 mA from 3 V power supply including I/O buffers for measurement. ECL based static divider operated up to 12.5 GHz while generating divide by 8 output frequency. The static divider drains 22 mA from 3 V power supply.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.292-292
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• 2014

Wide band gap semiconductors, such as III-nitrides (GaN, AlN, InN, and their alloys), SiC, and diamond are expected to play an important role in the next-generation electronic devices. Specifically, GaN-based high electron mobility transistors (HEMTs) have been targeted for high power, high frequency, and high temperature operation electronic devices for mobile communication systems, radars, and power electronics because of their high critical breakdown fields, high saturation velocities, and high thermal conductivities. For the stable operation, high power, high frequency and high breakdown voltage and high current density, the fabrication methods have to be optimized with considerable attention. In this study, low ohmic contact resistance and smooth surface morphology to AlGaN/GaN on 2 inch c-plane sapphire substrate has been obtained with stepwise annealing at three different temperatures. The metallization was performed under deposition of a composite metal layer of Ti/Al/Ni/Au with thickness. After multi-layer metal stacking, rapid thermal annealing (RTA) process was applied with stepwise annealing temperature program profile. As results, we obtained a minimum specific contact resistance of $1.6{\times}10^{-7}{\Omega}cm2$.

• 한국광학회지
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• 제4권3호
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• pp.294-300
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• 1993

표면광 마이크로 레잊, heterojunction phototransistor 그리고 저항을 단일 결정으로 성장시켜 집적시킨 NOR와 INVERTER 능동형 광 논리 소자에 대한 동작 특성을 조사하였다. 능동형 광 놀리 소자를 구성하는 개개 소자 중에서, 780 nm에서 발진하는 특정한 AlGaAs 초격자 마이크로 레이저의 미분 양자 효율은 15%로 나타났고, heterojunction phototransistor의 전류 이득은 에미터-컬렉터 전압이 4V이고, 입력 광의 세기가 $50{\mu}W$일 때 57으로 측정되었다. 직렬 저항이 370 ohm인 광 논리 소자의 출력은 입력광세기사 $47{\mu}W$일 때 $57{\mu}W$에서 $0{\mu}W$으로 감소하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.497-505
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• 2016

The two-dimensional (2D) Discrete Cosine Transform (DCT) is used widely in image and video processing systems. The perception of human visualization permits us to design approximate rather than exact DCT. In this paper, we propose a digital implementation of 16-point approximate 2D DCT architecture based on one-dimensional (1D) DCT and Modified Gate Diffusion Input (MGDI) technique. The 8-point 1D Approximate DCT architecture requires only 12 additions for realization in digital VLSI. Additions can be performed using the proposed 8 transistor (8T) MGDI Full Adder which reduces 2 transistors than the existing 10 transistor (10T) MGDI Full Adder. The Approximate MGDI 2D DCT using 8T MGDI Full adders is simulated in Tanner SPICE for $0.18{\mu}m$ CMOS process technology at 100MHZ.The simulation result shows that 13.9% of area and 15.08 % of power is reduced in the 8-point approximate 2D DCT, 10.63 % of area and 15.48% of power is reduced in case of 16-point approximate 2D DCT using 8 Transistor MGDI Full Adder than 10 Transistor MGDI Full Adder. The proposed architecture enhances results in terms of hardware complexity, regularity and modularity with a little compromise in accuracy.