• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.436-447
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• 2013

In this paper, Integrated circuit(IC) electromagnetic(EM) conducted immunity measurement and simulation using bulk current injection(BCI) and direct power injection(DPI) methods were conducted for 1.8 V I/O buffers. Using the equivalent circuit models developed for IC electromagnetic conducted immunity tests, we investigated the reliability of the frequency region where IC electromagnetic conducted immunity test is performed. The insertion loss for the noise injection path obtained from the simulation indicates that using only one conducted immunity test method cannot provide reliable conducted immunity test for broadband noise. Based on the forward power results, we analyzed the actual amount of EM noise injected to IC. We propose a more reliable immunity test methods for broad band noise.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.360-361
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• 2013

본 논문에서는 Power Integration사의 플라이백 컨버터 제어 IC인 TOP258YN의 주요 기능을 PSPICE로 구현 및 검증하였다. PSPICE를 이용한 IC 모델링을 통하여 제한적으로 제공되던 IC의 모델링을 시뮬레이션이 가능하도록 하였다. 모델링를 이용하여 실시한 시뮬레이션과 회로 실험 비교를 통하여 본 논문을 검증한다.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1140-1141
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• 2007

A method of modeling the Smart Power IC is presented in this paper, which is based on the IC's typical operation characteristics and small signal frequency response data. Using the least square identification, the IC's dynamic mathematical model, which is expressed as transfer function, can be synthesized from the experimentally obtained gain and phase data. The practicability and effectiveness of the method are verified by means of experiments.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.6
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• pp.633-643
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• 2013

GDS format files, as well as layout of the chip are noticeably needed so as to analyze the PDN (Power Delivery Network) inside of IC; however, commercial IC in the market has not supported design information which is layout of IC. Within this, in terms of IC having on-chip PDN, characteristic of inside PDN of the chip is a core parameter to predict generated noise from power/ground planes. Consequently, there is a need to scrutinize extraction method for unknown PDN of the chip in this paper. To extract PDN of the chip without IC circuit information, the de-embedding test vehicle is fabricated based on IEC62014-3. Further more, the extracted inside PDN of chip from de-embedding technique adopts the Co-simulation model which composes PCB, QFN (Quad-FlatNo-leads) Package, and Chip for the PDN, applied Co-simulation model well corresponds with impedance from measured S-parameters up to 4 GHz at common measured and simulated points.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.8
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• pp.27-34
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• 2012

This paper proposes variable incremental conductance(IC) algorithm for maximum power point tracking(MPPT) control of photovoltaic. The conventional perturbation & observation(PO) and IC MPPT control algorithm generally uses fixed step size. A small step size reduces a tracking error in the steady state but slows a tracking speed in the transient state. Also, a large step size is fast a tracking speed but increases a tracking error. Therefore, this paper proposes variable IC MPPT algorithm that adjust automatically step size according to operating conditions. To improve a tracking speed and accuracy, when operating point is far from the maximum power point(MPP), the step size uses maximum value and when a operating point is near from the MPP, the step size uses variable step size that adjust according to slope of P-V curve. The validity of MPPT algorithm proposed in this paper prove through compare with conventional PO and IC MPPT algorithm.

• Proceedings of the Korean Society of Computer Information Conference
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• 2020.07a
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• pp.327-328
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• 2020

본 논문에서는 저전력 저비용 임베디드 환경에서 PCB 검사 기법을 제안한다. 특히, IC 미삽에 대한 검출 알고리즘을 제안하고 실험한다. 고사양의 컴퓨팅 시스템에서는 CNN과 같은 딥러닝 뉴럴 네트워크를 사용하여 특별한 알고리즘을 고려하지 않아도 대규모의 데이터를 입력함으로써 모델을 완성하고 이를 통해 PCB 검사를 수행할 수 있다. 그러나 데이터의 양이 충분하지 않거나 충분한 전력과 비용을 투입하지 못하는 임베디드 환경에서는 각 부품에 따른 컴퓨터 비전 알고리즘이 필요하다. IC의 경우 타부품에 비하여 형태가 직사각으로 정형화 되있으며 색상도 균일한 특징을 가지고 있기에 미삽에 대한 검출이 가능하다. 베어보드(Bare Board)의 색상과 IC 부품의 색상이 확연히 다를 경우에는 RGB 픽셀을 카운트 하는 히스토그램 카운팅 알고리즘만으로 검출이 가능하다. 베어보드의 색삭과 IC의 색상이 유사할 경우에는 베어보드의 핀 혹은 홀의 형태를 감지하여 검출이 가능하다. 본 논문에서는 베어보드의 색상와 IC의 색상이 같을 경우에 다를 경우를 나누어 미삽 검사를 수행하고 그 정확도를 확인한다.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.1-6
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• 2013

3D integrated circuit(IC) technology with TSV(through Si via) liquid cooling system is discussed. As a device scales down, both interconnect and packaging technologies are not fast enough to follow transistor's technology. 3D IC technology is considered as one of key technologies to resolve a device scaling issue between transistor and packaging. However, despite of many advantages, 3D IC technology suffers from power delivery, thermal management, manufacturing yield, and device test. Especially for high density and high performance devices, power density increases significantly and it results in a major thermal problem in stacked ICs. In this paper, the recent studies of TSV liquid cooling system has been reviewed as one of device cooling methods for the next generation thermal management.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.13 no.4
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• pp.85-98
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• 2003

Computational power of IC chip is improved day after day producing IC chips holding co-processor continuously. Also a lot of wireless terminals which IC chip embedded in are produced in order to provide simple and various services in the wireless terminal market. However it is difficult to apply the key distribution protocol under wired communication environment to wireless communication environment. Because the computational power of co-processor embedded in IC chip under wireless communication environment is less than that under wired communication environment. In this paper, we propose the hey distribution protocol appropriate for wireless communication environment which diminishes the computational burden of server and client by using co-processor that performs cryptographic operations and makes up for the restrictive computational power of terminal. And our proposal is satisfied with the security requirements that are not provided in existing key distribution protocol.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.152-159
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• 2004

In this study, we design the one-chip PWM IC with high voltage power switch (300V class LDMOSFET) for SMPS (Switching Mode Power Supply) application. Reference circuits generate constant voltage(5V) in the various of power supply and temperature condition. Error amp. is designed with large DC gain $({\simeq}65dB)$, unity frequency $({\simeq}190kHz)$ and large $PM(75^{\circ})$. comparator is designed with 2 stage. Saw tooth generators operate with 20kHz oscillation frequency. Also, we optimize drift concentration & drift length of n-LDMOSFET for design of high voltage switching device. It is shown that simulation results have the breakdown voltage of 350V. (using ISE-TCAD Simulation tool). PWM IC with power switching device is designed with 2um design rule and Bi-DMOS technology.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.12
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• pp.1-6
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• 2018

This study examined the quality improvement of printed circuit boards (PCBs) in relation to the power consumption for radar. The radar examined is currently in production and being used by the military. The PCB converts 28 V DC to 5 V DC but frequently malfunctions. Therefore, cause analysis was carried out. As a result, the power consumed by a certain communication IC was very high, and the heat generated by the high power consumption caused damage to the surrounding parts. Accordingly, it was changed to an improved communication IC that meets all the radar system specifications. System tests were carried out for the changed communication IC to check the impact on the system, and environmental tests were performed, which proved that the performance required by the radar system is satisfactory. As a result of this improvement, there has been no history of failure in this PCB so far. Therefore, the quality of this PCB has been improved.