• International Journal of Computer Science & Network Security
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• 제21권3호
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• pp.212-218
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• 2021

Low-power and Lossy Networks (LLNs) have become the common network infrastructure for a wide scope of Internet of Things (IoT) applications. For efficient routing in LLNs, IETF provides a standard solution, namely the IPv6 Routing Protocol for LLNs (RPL). It enables effective interconnectivity with IP networks and flexibly can meet the different application requirements of IoT deployments. However, it still suffers from different open issues, particularly in large-scale setups. These include the node unreachability problem which leads to increasing routing losses at RPL sink nodes. It is a result of the event of memory overflow at LLNs devices due to their limited hardware capabilities. Although this can be alleviated by the establishment of multi-sink topologies, RPL still lacks the support for effective load balancing among multiple sinks. In this paper, we address the need for an efficient multi-sink load balancing solution to enhance the performance of PRL in large-scale scenarios and alleviate the node unreachability problem. We propose a new RPL objective function, Multi-Sink Load Balancing Objective Function (MSLBOF), and introduce the Memory Utilization metrics. MSLBOF enables each RPL node to perform optimal sink selection in a way that insure better memory utilization and effective load balancing. Evaluation results demonstrate the efficiency of MSLBOF in decreasing packet loss and enhancing network stability, compared to MRHOF in standard RPL.

• Journal of Power Electronics
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• 제17권4호
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• pp.1037-1047
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• 2017

The Differential Power Processing (DPP) converter is a promising multi-module photovoltaic inverter architecture recently proposed for photovoltaic systems. In this paper, a DPP converter architecture, in which each PV-panel has its own DPP converter in shunt, performs distributed maximum power point tracking (DMPPT) control. It maintains a high energy conversion efficiency, even under partial shading conditions. The system architecture only deals with the power differences among the PV panels, which reduces the power capacity of the converters. Therefore, the DPP systems can easily overcome the conventional disadvantages of PCS such as centralized, string, and module integrated converter (MIC) topologies. Among the various types of the DPP systems, the feed-forward method has been selected for both its voltage balancing and power transfer to a modified H-bridge inverter that needs charge balancing of the input capacitors. The modified H-bridge multi-level inverter had some advantages such as a low part count and cost competitiveness when compared to conventional multi-level inverters. Therefore, it is frequently used in photovoltaic (PV) power conditioning system (PCS). However, its simplified switching network draws input current asymmetrically. Therefore, input capacitors in series suffer from a problem due to a charge imbalance. This paper validates the operating principle and feasibility of the proposed topology through the simulation and experimental results. They show that the input-capacitor voltages maintain the voltage balance with the PV MPPT control operating with a 140-W hardware prototype.

• Journal of Mechanical Science and Technology
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• 제14권6호
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• pp.590-596
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• 2000

Cause of excessive vibration with twice the rotational speed of a two-pole generator rotor for the fossil power plants was investigated. The two-pole generator rotor, treated as a typically asymmetric rotor in vibration analysis, produces asynchronous vibration with twice the rotational speed, sub-harmonic critical speeds, and potentially unstable operating zones due to its own inertia and/or stiffness asymmetry. This paper introduces a practical balancing procedure, and presents the results of the investigation on sources of the excessive vibration based on the experimental vibration data of the asymmetric two-pole rotor in balancing.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2010년도 하계학술대회 논문집
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• pp.228-229
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• 2010

This paper presents an active voltage balancing approach using a forward fly-back power converter. In the proposed balancing scheme, cell with the higher voltage is selected to extract the extra energy and then a proportion of this extracted energy is distributed to other supercapacitors via the proposed circuit. A system structure consisting of five supercapacitors is built up to verify operation of the proposed scheme.

• 전력전자학회논문지
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• 제23권1호
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• pp.40-46
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• 2018

In this study, the output voltage balancing characteristics of parallel-input series-output (PISO) boost converter is analyzed. The PISO boost converter is derived by combining two basic boost converters. In comparison with the conventional three-level boost converter, the PISO boost converter can balance the output voltages under an unbalanced load condition without requiring additional circuit components and control strategy. A 2 kW prototype converter is built and tested to verify the output voltage balancing characteristics of the PISO boost converter.

• 전력전자학회논문지
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• 제26권1호
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• pp.66-73
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• 2021

This study presents a novel four-channel light-emitting diode (LED) current balancing topology using a current-fed hybrid quasi-Z-source converter. With the proposed structure, currents flowing through four LED strings are automatically balanced owing to the charge (amp-sec) balance condition on capacitors. Thus, automatic current balancing of the proposed driver is simple and precise. In addition, the proposed LED driver uses only one active switch and three diodes. The operating principle and characteristics of the proposed four-channel LED driver are analyzed in detail. To verify the operation of the proposed LED driver, a prototype is built and tested with different numbers of LEDs.

• 전력전자학회논문지
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• 제27권1호
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• pp.9-17
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• 2022

The series-connected semiconductor devices structure is one way to achieve a high voltage rating. However, a problem with voltage imbalance exists in which different voltages are applied to the series-connected switches. This paper proposed a new voltage balancing technique that controls the turn-off delay time of the switch by adding one bipolar junction transistor to the gate turn-off path. The validity of the proposed method is proved through simulation and experiment. The proposed active gate driver not only enables voltage balancing across a variety of current ranges but also has a greater voltage balancing performance compared with conventional RC snubber methods.

• Journal of Power Electronics
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• 제14권2호
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• pp.282-291
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• 2014

This paper presents a detailed theoretical analysis and performance assessment of the capacitor voltage balancing strategies for staircase modulated modular multilevel converters (MMC) in terms of the algorithm structures, voltage balancing effect, and switching frequency. A constant-frequency redundancy selection (CFRS) method with minimal switching loss is proposed and the function realization of specific modules of the algorithm is given. This method is simple and efficient in both switching frequency and regulation capacity. Laboratory results show very good agreement with the theoretical analysis and numerical simulations.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제55권7호
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• pp.374-379
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• 2006

The switch mode power supply is a source of EMI with other equipment as well as with its own proper operation because of rapid changes in voltages and currents within a switching converter. The EMI is transmitted in two forms: radiated and conducted. Conducted noise consists of two categories known as the differential mode and the common mode. Common mode noise current is a major source of EMI in the switch mode Power supply. Recently, a current balancing technique has been studied to reduce the common mode noise. This paper investigates the reduction of common mode noise according to a node expansion of the switch mode power supply which is based on a current balancing technique. In this paper, seven PCB patterns of the forward converter are manufactured and experimented.

• Journal of Power Electronics
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• 제15권3호
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• pp.660-669
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• 2015

This paper presents a control scheme with a focus on the combination of phase disposition pulse width modulation (PDPWM) and DC capacitor voltage control for a chopper-cell based modular multilevel converter (MMC) for the purpose of eliminating the time-consuming voltage sorting algorithm and complex voltage balancing regulators. In this paper, the convergence of the DC capacitor voltages within one arm is realized by charging the minimum voltage module and discharging the maximum voltage module during each switching cycle with the assistances of MAX/MIN capacitor voltage detection and PDPWM signals exchanging. The process of voltage balancing control introduces no extra switching commutation, which is helpful in reducing power loss and improving system efficiency. Additionally, the proposed control scheme also possess the merit of a simple executing procedure in application. Simulation and experimental results indicates that the MMC circuit together with the proposed method functions very well in balancing the DC capacitor voltage and improving system efficiency even under transient states.