• Title/Summary/Keyword: Polycrystalline silicon

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A Novel Poly-Si TFT Pixel circuit for AMOLED to Compensate Threshold Voltage Variation of TFT at Low Voltage (저전압에서 다결정 실리콘 TFT의 불균일한 특성을 보상한 새로운 AMOLED 구동회로)

  • Kim, Na-Young;Yi, Moon-Suk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.1-5
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    • 2009
  • A new pixel circuit for Active Matrix Organic Light Emitting Diodes (AMOLEDs), based on the polycrystalline silicon thin film transistors (Poly-Si TFTs), was proposed and verified by SMART SPICE simulation. One driving and six switching TFTs and one storage capacitor were used to improve display image uniformity without any additional control signal line. The proposed pixel circuit compensates an inevitable threshold voltage variation of Poly-Si TFTs and also compensates the degradation of OLED at low power supply voltage($V_{DD}$). The simulation results show that the proposed pixel circuit successfully compensates the variation of OLED driving current within 0.8% compared with 20% of the conventional pixel circuit.

The Study of poly-Si Eilm Crystallized on a Mo substrate for a thin film device Application (박막소자응용을 위한 Mo 기판 위에 고온결정화된 poly-Si 박막연구)

  • 김도영;서창기;심명석;김치형;이준신
    • Journal of the Korean Vacuum Society
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    • v.12 no.2
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    • pp.130-135
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    • 2003
  • Polycrystalline silicon thin films have been used for low cost thin film device application. However, it was very difficult to fabricate high performance poly-Si at a temperature lower than $600^{\circ}C$ for glass substrate because the crystallization process technologies like conventional solid phase crystallization (SPC) require the number of high temperature (600-$1000^{\circ}C$) process. The objective of this paper is to grow poly-Si on flexible substrate using a rapid thermal crystallization (RTC) of amorphous silicon (a-Si) layer and make the high temperature process possible on molybdenum substrate. For the high temperature poly-Si growth, we deposited the a-Si film on the molybdenum sheet having a thickness of 150 $\mu\textrm{m}$ as flexible and low cost substrate. For crystallization, the heat treatment was performed in a RTA system. The experimental results show the grain size larger than 0.5 $\mu\textrm{m}$ and conductivity of $10^{-5}$ S/cm. The a-Si was crystallized at $1050^{\circ}C$ within 3min and improved crystal volume fraction of 92 % by RTA. We have successfully achieved a field effect mobility over 67 $\textrm{cm}^2$/Vs.

Characterization of length and width of poly-silicon thin film transistors (TFT의 길이와 두께에 관한 특성)

  • Lee, Jeoung-In;Hwang, Sung-Hyun;Jung, Sung-Wook;Jang, Kyung-Soo;Lee, Kwang-Soo;Chung, Ho-Kyoon;Choi, Byoung-Deog;Lee, Ki-Yong;Yi, Jun-Sin
    • Proceedings of the KIEE Conference
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    • 2006.10a
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    • pp.121-122
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    • 2006
  • Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TITs performance. Transfer characteristics of n-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of $2-30{\mu}m$ has been investigated. In this paper, we analyzed the data of n-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current (I_{DSAT}$), and transconductance ($g_m$) of n-channel poly-Si thin film transistors with various channel lengths and widths.

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Structure and Properties of Hemispherical Grain LPCVD Polycrystalline Silicon Films (반구형 LPCVD 다결정 실리콘 박막의 구조 및 특성)

  • Park, Yeong-Jin;Jeon, Ha-Eung;Lee, Seung-Seok;Lee, Seok-Hui;U, Sang-Ho;Kim, Jong-Cheol;Park, Heon-Seop;Cheon, Hui-Gon;O, Gye-Hwan
    • Korean Journal of Materials Research
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    • v.1 no.2
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    • pp.77-85
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    • 1991
  • In this study we have investigated surface morphologies of as-deposited silicon films on the various deposition conditions using LPCVD(Low Pressure Chemical Vapor Deposition) System. The processing conditions such as deposition temperature, pressure and flow rate of $SiH_4$ gas were found to determine the surface morphology. The optimum temperature of maximum effective surface area increased with increasing the deposition pressure and the flow rate of $SiH_4$ gas, These experimental results were also in quite good agreement with the equation derived under the assumption that the maximum effective surface area is obtained on the condition of maximum nucleation rate.

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A Study on Poly-Si Solar Cell of Novel Structure with the Reduced Effects of Grain Boundaries (결정입계 영향을 줄인 새로운 구조의 다결정 실리콘 모양전지에 관한 연구)

  • Lim, Dong-Gun;Lee, Su-Eun;Park, Sung-Hyun;Yi, Jun-Sin
    • Proceedings of the KIEE Conference
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    • 1999.07d
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    • pp.1738-1740
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    • 1999
  • This paper deals with a novel structure of poly-Si solar cell. A solar cell conversion efficiency was degraded by grain boundary effect in Polycrystalline silicon. To reduce grain boundary effect, we performed a preferential grain boundary etching, $POCl_3$ n-type emitter doping, and then ITO film growth on poly-Si. Among the various preferential etchants, Schimmel etch solution exhibited the best result having grain boundary etch depth about $10{\mu}m$. RF magnetron sputter grown ITO films showed a low resistivity of $10^{-4}\Omega-cm$ and high transmittance of 85%. With well fabricated poly-Si solar cells. we were able to achieve as high as 15% conversion efficiency at the input power of 20mW/$cm^2$.

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Development and Applications of Material Testers for the Thin Films (박막 재료 시험기 개발 및 응용)

  • Ahn Hyun-Gyun;Lee Hak-Joo;Oh Chung-Seog
    • Journal of the Korean Society for Precision Engineering
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    • v.23 no.3 s.180
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    • pp.163-170
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    • 2006
  • Thin films play an important role in many technological applications including microelectronic devices, magnetic storage media, MEMS and surface coatings. It is well known that a thin film's material properties can be very different front the corresponding bulk properties and thus there has been a strong need for the development of a miniature tester to measure the mechanical properties of a thin film. Two testers are designed and set up in small size of 62 mm width, 20 mm depth and 90-120 mm height to fit in a chamber of scanning electron microscope (SEM). One tester has a homemade 0.2 N load cell and a low-priced electromagnetic actuator. The other has a commercial 5 N load cell, a $52{\mu}m$ piezoelectric actuator and some novel grips. Two types of 3.5 microns thick polysilicon specimen are tested to prove the testers' applicability. The strain is measured by the two ways. Firstly, it is measured by an ISDG system in the atmosphere far the reference. Secondly, the same test is repeated in a SEM chamber to monitor the strain as an in-situ experiment. The strain is evaluated by observing the gap change between two markers.

Comparison of the Characteristics of Polycrystalline Silicon Thin Films Between Rapid Thermal Annealing and laser Annealing Methods (급속열처리와 엑시머 레이저에 의해 형성된 다결정 실리콘 박막에서 열처리 방법에 따른 박막의 특성변화)

  • Lee, Chang-U;Go, Min-Gyeong;U, Sang-Rok;Go, Seok-Jung;Lee, Jeong-Yong;Choe, Gwang-Ryeol;Choe, Yeong-Seok
    • Korean Journal of Materials Research
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    • v.7 no.10
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    • pp.908-913
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    • 1997
  • 플라즈마 화학 증착 방법에 의해 corning 7059 유리기판위에 비정질 실리콘 박막을 만들고 고온열처리, 다단계급속열처리, 일차원 선형빔(line shape beam)의 가우스 분포를 가지는 엑시머 레이저 열처리를 이용하여 고상 및 액상의 재결정화를 통해 다결정 실리콘 박막을 제작하였다. 편광된 라만 분광학(Raman spectroscopy)을 통하여 여러 가지 열처리 방법과 기판온도에 따른 다결정 실리콘 박막의 잔류응력을 조사하였다. 레이저 열처리에 의하여 결정화된 실리콘 기판의 경우, 높은 결정화된 체적량과 잔류응력을 갖으며 equaxial결정성을 갖는다. 그러나 이러한 고상 재결정화된 다결정 실리콘 박막은 라만스펙트럼에서 480$cm^{-1}$ /주위에 넓게 퍼져있어 비정질상(amorphous phase)이 함께 존재함을 알 수 있다. 고온열처리와 다단계급속열처리의 경우 잔류응력의 크기는 각각 4.07x$10^{9.}$과 4.56x$10^{9 dyne}$ $\textrm{cm}^2$이다. 또한 엑시머레이저 열처리의 경우 기판온도가 상온에서 40$0^{\circ}C$로 증가할수록 열적인 완화에 의해 잔류응력이 1.35x$10^{10}$에서 8.58x$10^{9}$dyne/$\textrm{cm}^2$으로 감소하는 것을 알 수 있다.다.

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Novel F-shaped Triple Gate Structure for Suppression of Kink Effect and Improvement of Hot Carrier Reliability in Low Temperature polycrystalline Silicon Thin-Film Transistor (킹크효과 억제를 위한 새로운 f-모양 트리플게이트 구조의 저온 다결정실리콘 박막트랜지스터)

  • Song, Moon-Kyu;Choi, Sung-Hwan;Kuk, Seung-Hee;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1416-1417
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    • 2011
  • 킹크효과를 억제할 수 있는 새로운 f-모양 트리플게이트 구조를 가지는 다결정실리콘 박막트랜지스터는 추가적인 공정과정 없이 제안 및 제작되었다. 이러한 다결정실리콘 박막트랜지스터의 채널에는 순차적인 횡방향 고체화(Sequential Lateral Solidification, SLS)나 CW 레이져 횡방향 결정화(CW laser Lateral Crystallization, CLC) 등과 같은 방법으로 제작된 횡방향으로 성장시킨 그레인이 있다. 이 소자의 전체적인 전류흐름은 횡방향으로 성장시킨 그레인 경계에 강력하게 영향을 받는다. f-모양 트리플게이트에는 횡방향으로 성장시킨 그레인과 평행한 방향으로 위치한 채널, 그리고 수직인 방향으로 위치한 채널이 있다. 이 소자는 f-모양 게이트 구조에서의 비대칭 이동도를 이용하여 다결정실리콘 박막트랜지스터의 킹크효과를 효과적으로 억제시킬 수 있다는 사실을 실험과 시뮬레이션을 통해 검증되었다. 우리의 실험 결과는 이 논문에서 제안된 f-모양 트리플게이트 박막트랜지스터가 기존의 박막트랜지스터와 비교할 때 더 효과적으로 킹크 효과를 감소시킬 수 있다는 것을 보여주었다. 또한 고온 캐리어 스트레스 조건에서의 신뢰성도 개선할 수 있음이 확인되었다.

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Dependence of Gas Pressure on Cr Oxide Thin Film Growth Using a Plasma Focus Device (플라즈마 포커스를 이용한 크롬 산화물 박막 성장의 분위기 기체 압력 의존성 연구)

  • Jung, Kyoo-Ho;Lee, Jae-Kap;Im, Hyun-Sik;Karpinski, L.;Scholz, M.;Lee, Jeon-Kook
    • Korean Journal of Materials Research
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    • v.17 no.6
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    • pp.308-312
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    • 2007
  • Chromium oxide thin films have been deposited on silicon substrates using a tabletop 9kJ mathertyped plasma focus (PF) device. Before deposition, pinch behavior with gas pressure was observed. Strength of pinches was increased with increasing working pressure. Deposition was performed at room temperature as a function of working pressure between 50 and 1000 mTorr. Composition and surface morphology of the films were analyzed by Auger Electron Spectroscopy and Scanning Electron Microscope, respectively. Growth rates of the films were decreased with pressure. The oxide films were polycrystalline containing some impurities, Cu, Fe, C and revealed finer grain structure at lower pressure.

Poly-Si Thin Films by Hot-wire Chemical Vapor Deposition Method (열선 CVD법에 의한 다결정 실리콘 박막증착 및 특성분석)

  • Chung, Y.S.;Lee, J.C.;Kim, S.K.;Youn, K.H.;Song, J.S.;Park, I.J.;Kwon, S.W.;Lim, K.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.1030-1033
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    • 2003
  • This paper presents the deposition characterization of polycrystalline silicon films by the HWCVD(Hot-wire Chemical Vapor Deposition) method at low substrate($300^{\circ}C$). The filament temperature, pressure and $SiH_4$ concentration were determined to be a critical parameter for the deposition of poly-Si films. Series A was deposited under the conditions of $1380^{\circ}C$(Tf), 100 mTorr and $2{\sim}10%\{SiH_4/(SiH_4+H_2)\}$ for 60 min. Series B was deposited under the conditions of $1400{\sim}1450^{\circ}C$ (Tf), 30 mTorr and $2{\sim}12%$ for 60 min. The physical characteristics were measured by Raman and FTIR spectroscopy, dark and photoconductivity measurements under AM1.5 illumination.

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