Proceedings of the Korean Vacuum Society Conference
/
2014.02a
/
pp.493-493
/
2014
The manufacturing cost of thin-film photovoltics can potentially be lowered by minimizing the amount of a semiconductor material used to fabricate devices. Thin-film solar cells are typically only a few micrometers thick, whereas crystalline silicon (c-Si) wafer solar cells are $180{\sim}300\mu}m$ thick. As such, thin-film layers do not fully absorb incident light and their energy conversion efficiency is lower compared with that of c-Si wafer solar cells. Therefore, effective light trapping is required to realize commercially viable thin-film cells, particularly for indirect-band-gap semiconductors such as c-Si. An emerging method for light trapping in thin film solar cells is the use of metallic nanostructures that support surface plasmons. Plasmon-enhanced light absorption is shown to increase the cell photocurrent in many types of solar cells, specifically, in c-Si thin-film solar cells and in poly-Si thin film solar cell. By proper engineering of these structures, light can be concentrated and coupled into a thin semiconductor layer to increase light absorption. In many cases, silver (Ag) nanoparticles (NP) are formed either on the front surface or on the rear surface on the cells. In case of poly-Si thin film solar cells, Ag NPs are formed on the rear surface of the cells due to longer wavelengths are not perfectly absorbed in the active layer on the first path. In our cells, shorter wavelengths typically 300~500 nm are also not effectively absorbed. For this reason, a new concept of plasmonic nanostructure which is NPs formed both the front - and the rear - surface is worth testing. In this simulation Al NPs were located onto glass because Al has much lower parasitic absorption than other metal NPs. In case of Ag NP, it features parasitic absorption in the optical frequency range. On the other hand, Al NP, which is non-resonant metal NP, is characterized with a higher density of conduction electrons, resulting in highly negative dielectric permittivity. It makes them more suitable for the forward scattering configuration. In addition to this, Ag NP is located on the rear surface of the cell. Ag NPs showed good performance enhancement when they are located on the rear surface of our cells. In this simulation, Al NPs are located on glass and Ag NP is located on the rear Si surface. The structure for the simulation is shown in figure 1. Figure 2 shows FDTD-simulated absorption graphs of the proposed and reference structures. In the simulation, the front of the cell has Al NPs with 70 nm radius and 12.5% coverage; and the rear of the cell has Ag NPs with 157 nm in radius and 41.5% coverage. Such a structure shows better light absorption in 300~550 nm than that of the reference cell without any NPs and the structure with Ag NP on rear only. Therefore, it can be expected that enhanced light absorption of the structure with Al NP on front at 300~550 nm can contribute to the photocurrent enhancement.
Proceedings of the Korean Vacuum Society Conference
/
2010.02a
/
pp.151-151
/
2010
In this paper, the electrically properties of nonvolatile memory (NVM) using multi-stacks gate insulators of oxide-nitride-oxynitride (ONOn) and active layer of the low temperature polycrystalline silicon (LTPS) were investigated. From hydrogenated amorphous silicon (a-Si:H), the LTPS thin films with high crystalline fraction of 96% and low surface's roughness of 1.28 nm were fabricated by the metal induced crystallization (MIC) with annealing conditions of $650^{\circ}C$ for 5 hours on glass substrates. The LTPS thin film transistor (TFT) or the NVM obtains a field effect mobility of ($\mu_{FE}$) $10\;cm^2/V{\cdot}s$, threshold voltage ($V_{TH}$) of -3.5V. The results demonstrated that the NVM has a memory window of 1.6 V with a programming and erasing (P/E) voltage of -14 V and 14 V in 1 ms. Moreover, retention properties of the memory was determined exceed 80% after 10 years. Therefore, the LTPS fabricated by the MIC became a potential material for NVM application which employed for the system integration of the panel display.
Proceedings of the Korean Vacuum Society Conference
/
2013.02a
/
pp.470-470
/
2013
Recently, active materials such as amorphous silicon (a-Si), poly crystalline silicon (poly-Si), transition metal oxide semiconductors (TMO), and organic semiconductors have been demonstrated for flexible electronics. In order to apply flexible devices on the polymer substrates, all layers should require the characteristic of flexibility as well as the low temperature process. Especially, pentacene thin film transistors (TFTs) have been investigated for probable use in low-cost, large-area, flexible electronic applications such as radio frequency identification (RFID) tags, smart cards, display backplane driver circuits, and sensors. Since pentacene TFTs were studied, their electrical characteristics with varying single variable such as strain, humidity, and temperature have been reported by various groups, which must preferentially be performed in the flexible electronics. For example, the channel mobility of pentacene organic TFTs mainly led to change in device performance under mechanical deformation. While some electrical characteristics like carrier mobility and concentration of organic TFTs were significantly changed at the different temperature. However, there is no study concerning multivariable. Devices actually worked in many different kinds of the environment such as thermal, light, mechanical bending, humidity and various gases. For commercialization, not fewer than two variables of mechanism analysis have to be investigated. Analyzing the phenomenon of shifted characteristics under the change of multivariable may be able to be the importance with developing improved dielectric and encapsulation layer materials. In this study, we have fabricated flexible pentacene TFTs on polymer substrates and observed electrical characteristics of pentacene TFTs exposed to tensile and compressive strains at the different values of temperature like room temperature (RT), 40, 50, $60^{\circ}C$. Effects of bending and heating on the device performance of pentacene TFT will be discussed in detail.
High quality diamond films of the silicon on diamond (SOD) structure are deposited using CO and $H_2$ gas mixture in microwave plasma chemical vapor deposition (CVD), a SOD structure is fabricated using low pressure CVD polysilicon on diamond/ Si(100) substrate. The crystalline structure of the diamond films which composed of { 111} and {100} planes. were changed from octahedral one to cubo-octahedron one as the CO/$H_2$ ratios are increased. The high quality diamond films without amorphous carbon and non-diamond elements were deposited at the CO/$H_2$ flow rate of 0.18. and the main phase of the diamond films shows (111) plane. The diamond/Si(lOO) structure shows that the interface is flat without voids. The measured dielectric constant. leakage current and breakdown field were $5.31\times10^{-9}A/cm^2$ and $9\times{10^7}{\Omega}cm$ respectively.
Shirai, Hajime;Ohki, Tatsuya;Liu, Qiming;Ichikawa, Koki
Proceedings of the Korean Vacuum Society Conference
/
2016.02a
/
pp.388-388
/
2016
Chemical mist deposition (CMD) of poly(3,4-ethylenedioxythiophene):poly(styrene sulfonate) (PEDOT:PSS) was investigated with cavitation frequency f, solvent, flow rate of nitrogen, substrate temperature $T_s$, and substrate dc bias $V_s$ as variables for efficient PEDOT:PSS/crystalline (c-)Si heterojunction solar cells (Fig. 1). The high-speed camera and differential mobility analysis characterizations revealed that average size and flux of PEDOT:PSS mist depend on f, solvent, and $V_s$. The size distribution of mist particles including EG/DI water cosolvent is also shown at three different $V_s$ of 0, 1.5, and 5 kV for a f of 3 MHz (Fig. 2). The size distribution of EG/DI water mist without PEDOT:PSS is also shown at the bottom. A peak maximum shifted from 300-350 to 20-30 nm with a narrow band width of ~150 nm for PEDOT:PSS solution, whose maximum number density increased significantly up to 8000/cc with increasing $V_s$. On the other hand, for EG/water cosolvent mist alone, the peak maximum was observed at a 72.3 nm with a number density of ~700/cc and a band width of ~160 nm and it decreased markedly with increasing $V_s$. These findings were not observed for PEDOT:PSS/EG/DI water mist. In addition, the Mie scattering image of PEDOT:PSS mist under white bias light was not observed at $V_s$ above 5 kV, because the average size of mist became smaller. These results imply that most of solvent is solvated in PEDOT:PSS molecule and/or solvent is vaporized. Thus, higher f and $V_s$ generate preferentially fine mist particle with a narrower band width. Film deposition occurred when $V_s$ was impressed on positive to a c-Si substrate at a Ts of $30-40^{\circ}C$, whereas no deposition of films occurred on negative, implying that negatively charged mist mainly provide the film deposition. The uniform deposition of PEDOT:PSS films occurred on textured c-Si(100) substrate by adjusting $T_s$ and $V_s$. The adhesion of CMD PEDOT:PSS to c-Si enhanced by $V_s$ conspicuously compared to that of spin-coated film. The CMD PEDOT:PSS/c-Si solar cell devices on textured c-Si(100) exhibited a ${\eta}$ of 11.0% with the better uniformity of the solar cell parameters. Furthermore, ${\eta}$ increased to 12.5% with a $J_{sc}$ of $35.6mA/cm^2$, a $V_{oc}$ of 0.53 V, and a FF of 0.67 with an antireflection (AR) coating layer of 20-nm-thick CMD molybdenum oxide $MoO_x$ (n= 2.1) using negatively charged mist of 0.1 wt% 12 Molybdo (VI) phosphoric acid n-Hydrate) $H_3(PMo_{12}O_40){\cdot}nH_2O$ in methanol. CMD. These findings suggest that the CMD with negatively charged mist has a great potential for the uniform deposition of organic and inorganic on textured c-Si substrate by adjusting $T_s$ and $V_s$.
Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
/
2009.11a
/
pp.252-252
/
2009
In this work, the nanocrystalline ZnO/polycrystalline (poly) aluminum nitride (AlN)/Si structure was fabricated for humidity sensor applications based on surface acoustic wave (SAW). In this structure, the ZnO film was used as sensing material layer. These ZnO and AlN(0002) were deposited by so-gel process and a pulse reactive magnetron sputtering, respectively. These experimental results showed that the obtained SAW velocity on AlN film was about 5128 m/s at $h/\lambda$=0.0125 (h and $\lambda$ is thickness and wavelength, respectively). For ZnO sensing layers coated on AlN, films have hexagonal wurtzite structure and nanometer particle size. The crystalline size of ZnO films annealed at 400, 500, and 600 $^{\circ}C$ is 10.2, 29.1, and 38 nm, respectively. Surface of the film exhibits spongy which can adsorb steam in the air. The best quality of the ZnO film was obtained with annealing temperature at 500 $^{\circ}Cis$. The change in frequency response (127.9~127.85 MHz) of the SAW humidity sensor based on ZnO/AlN structure was measured along the change in humidity (41~69%). The structural properties of thin films wereinvestigated by XRD and SEM.
Journal of the Korean Crystal Growth and Crystal Technology
/
v.3
no.1
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pp.59-65
/
1993
The boron-doped polycrystalline silicon films which can be used in pressure sensors were fabricated in a high-vacuum resistance heating evaporator. Poly-Si films were deposited on quartz substrates at various temperatures and the boron was doped to the silicon film in a diffusion furnace using BN wafer. The silicon films deposited at $500^{\circ}C$ was amorphous, began to show crystalline at $600^{\circ}C$, and became polycrystalline at $700^{\circ}C$. After doping boron at $900^{\circ}C$for 10 minutes, the resistivity of the films was in the range of $0.1{\Omega}cm~1.5{\Omega}cm$, the boron density was $9.4\times10^{15}~2.1\times{10}^{17}cm^{-3}$, and the grain size was $107{\AA}~191{\AA}$.
Park, Seok-Won;Park, Yu-Shin;Lim, Dong-Gun;Moon, Sang-Il;Kim, Sung-Hoon;Jang, Bum-Sik;Junsin Yi
The Korean Journal of Ceramics
/
v.6
no.2
/
pp.138-142
/
2000
Thin film $LiNbO_3$MFS (metal-ferroelectric-semiconductor) capacitor showed improved characteristics such as low interface trap density, low interaction with Si substrate, and large remanent polarization. This paper reports ferroelectric $LiNbO_3$thin films grown directly on p-type Si (100) substrates by 13.56 MHz RF magnetron sputtering system for FRAM (ferroelectric random access memory) applications. RTA (rapid thermal anneal) treatment was performed for as-deposited films in an oxygen atmosphere at $600^{\circ}C$ for 60sec. We learned from X-ray diffraction that the RTA treated films were changed from amorphous to poly-crystalline $LiNbO_3$which exhibited (012), (015), (022), and (023) plane. Low temperature film growth and post RTA treatments improved the leakage current of $LiNbO_3$films while keeping other properties almost as same as high substrate temperature grown samples. The leakage current density of $LiNbO_3$films decreased from $10^{-5}$ to $10^{-7}$A/$\textrm{cm}^2$ after RTA treatment. Breakdown electric field of the films exhibited higher than 500 kV/cm. C-V curves showed the clockwise hysteresis which represents ferroelectric switching characteristics. Calculated dielectric constant of thin film $LiNbO_3$illustrated as high as 27.9. From ferroelectric measurement, the remanent polarization and coercive field were achieved as 1.37 $\muC/\textrm{cm}^2$ and 170 kV/cm, respectively.
Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.
Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
/
2009.06a
/
pp.144-145
/
2009
Single crystal $CdGa_2Se_4$ layers were grown on a thoroughly etched semi-insulating GaAs(100) substrate at $420^{\circ}C$ with the hot wall epitaxy (HWE) system by evaporating the poly crystal source of $CdGa_2Se_4$ at $630\;^{\circ}C$. The crystalline structure of the single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). The carrier density and mobility of single crystal $CdGa_2Se_4$ thin films measured with Hall effect by van der Pauw method are $8.27\;\times\;10^{17}\;cm^{-3}$, $345\;cm^2/V{\cdot}s$ at 293 K, respectively. The photocurrent and the absorption spectra of $CdGa_2Se_4$/SI(Semi-Insulated) GaAs(100) are measured ranging from 293 K to 10K. The temperature dependence of the energy band gap of the $CdGa_2Se_4$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g$(T) = 2.6400 eV - ($7.721\;{\times}\;10^{-4}\;eV/K)T^2$/(T + 399 K). Using the photocurrent spectra and the Hopfield quasi cubic model, the crystal field energy(${\Delta}cr$) and the spin-orbit splitting energy(${\Delta}so$) for the valence band of the $CdGa_2Se_4$ have been estimated to be 106.5 meV and 418.9 meV at 10 K, respectively. The three photocurrent peaks observed at 10 K are ascribed to the $A_1$-, $B_1$-, and $C_{11}$-exciton peaks.
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