• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1462-1464
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• 1998

Poly-Si TFT(Thin Film Transistor) is a electronic device that can be applied to the field of large area electronics such as AMLCD. We have fabricated the poly-Si TFT with lateral body terminal that is counter-doped body electrode and investigated the electrical characteristics of it. The lateral body terminal being short with s terminal, we have measured the transfer charac (Vg-ld) and the output characteristic (Vd-ld) fabricated devices. The measured result showe only that leakage current in OFF-state was re and Kink effect in ON-state was suppressed bu that in output characteristic curve the output Id was sustained constantly with the output v Vd in the saturation region.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1105-1108
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• 2003

In this paper, we have fabricated the hydrogenated n-channel polysilicon thin film transistor (TFT) with LDD structure and have analyzed the hot carrier degradation characteristics by electrical stress. We have compared the threshold voltage (Vth), sub-threshold slope (S), and trans-conductance (Gm) for devices with LDD (Lightly Doped Drain) structure and non-LDD at same active sizes. We have analyzed the hot carrier effects by the hydrogenation in devices. As a analyzed results, the threshold voltage, sub-threshold slope for n-channel poly-si TFT were increased, trans-conductance was decreased. The effects of hydrogenation in n-channel poly-si TFT with LDD structure were shown the lower variations of characteristics than devices of the non-LDD structure with nomal process.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.12
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• pp.53-58
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• 1998

A buried channel poly-Si TFT (BCTFT) for application of high performance integrated circuits has been proposed and fabricated. BCTFT has unique features, such as the moderately-doped buried channel and counter-doped body region for conductivity modulation, and the fourth terminal entitled back bias for preventing kink effect. The n-type and p-type BCTFT exhibits superior performance to conventional poly-Si TFT in ON-current and field effect mobility due to moderate doping at the buried channel. The OFF-state leakage current is not increased because the carrier drift is suppressed by the p-n junction depletion between the moderately-doped buried channel and the counter-doped body region.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.339-343
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• 1999

This paper reports the characteristics of poly-Si TFT unitary CMOS circuits fabricated with various techniques, in order to investigate the optimum process conditions. The active films were deposited by PECVD and LPCVD using $SiH_4\; and\; Si_2H_6$ as source gas, and annealed by SPC and ELA methods. The impurity doping of the oource and drain electrodes was performed by ion implantation and ion shower. In order to investigate the AC characteristics of the poly-Si TFTs processed with various methods, we have examined the current driving characteristics of the polt-Si TFT and the frequency characteristics of 23-stage CMOS ring oscillators. Ithas been observed that the circuits fabricated using $Si_2H_6$ with low-temperature process of ELA exhibit high switching speed and current driving performances, thus suitable for real application of large area electronics.

• Journal of the Korean Society of Radiology
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• v.17 no.4
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• pp.625-631
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• 2023

The important requirement of industrial dynamic X-ray detector operating under high tube voltage up to 450 kVp for 24 hours and 7 days is to obtain significantly high radiation resistance. This study presents the radiation resistance characteristics of various thin film transistors (TFTs) with a-Si, poly-Si and IGZO semiconducting layers. IGZO TFT offering dozens of times higher field effect mobility than a-Si TFT was processed with highly hydrogenated plasma in between IGZO semiconducting layer and inter-layered dielectric. The hydrogenated IGZO TFT showed most sustainable radiation resistance up to 10,000Gy accumulated, thus, concluded that it is a sole switching device in X-ray imaging sensor offering dynamic X-ray imaging at high frame rate under extremely severe radiation environment such as automated X-ray inspection.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.295-296
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• 2005

Poly-Silicon Thin Film Transistor 응용을 위한 $SiO_2$ 박막 성장에 관한 연구로서 기존의 ICP-CVD를 이용한 실험에서 $SiH_4$ 가스대신 유기 사일렌 반응물질인 TEOS(TetraethylOrthosilicate) Source를 이용하여 APCVD 법으로 성장시켰다. $SiO_2$ 박막은 반도체 및 디스플레이 분야에서 필드산화막, 보호막, 게이트 절연막 등으로 사용되며, 이러한 산화막 증착을 TEOS를 이용하였고, 빠른 증착과 더 좋은 특성을 갖는 박막 형성을 위하여 $O_2$ 반응가스를 이용하였고, Ellipsometor, XPS 등을 이용하여 계면 특성 분석을 하였다.

• Electrical & Electronic Materials
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• v.9 no.1
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.292-292
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• 2011

TFT (Thin Film Transistor)에서 공정을 단순화 시키고, 가격을 하락시키기 위해서는 Poly-Si을 대체할 물질이 필요하다. 이 연구에서는 Chalcogenide Material의 하나인 GeTe 박막을 이용하여 TFT Channel으로 사용 가능한 물질인지 알아보기 위하여 Post-Annealing을 한 뒤, 상 변화에 따른 박막의 저항 변화, Carrier Concentration (cm-3)과 Mobility (cm2V-1s-1)의 변화를 알아보았다. Sputtering을 이용하여 증착한 GeTe 100 nm Thin Film 위에 Sputtering을 이용하여 SiO2 5 nm를 Capping Layer로 증착한 후, Post-Annealing을 200$^{\circ}C$, 300$^{\circ}C$, 400$^{\circ}C$, 500$^{\circ}C$로 온도를 변화 시키며 진행하였고, 이로 인하여 GeTe Thin Film에 외부의 영향을 최소화 하였다. 먼저 GeTe Thin Film의 Sheet Resistance를 측정한 결과는 300$^{\circ}C$ 까지 낮은 Sheet Resistance의 거동을 보이며 반면, 400$^{\circ}C$ 이상이 되면 높은 Sheet Resistance의 거동을 보인다. Hall Measurement를 통해, Carrier Concentration과 Mobility를 알아보았다. Carrier Concentration은 온도가 증가하면 1E+19에서 1E+21 까지 증가하며, Mobility는 감소하는 경향을 보인다. 500$^{\circ}C$ Post-Annealed GeTe Thin Film에서는 Resistivity가 상당히 높아 4 Point Probe (Range : 1 mohm/sq~2 Mohm/sq)로 측정이 불가능하다. XRD로 GeTe Thin Film을 분석한 결과 as-grown, 200$^{\circ}C$, 300$^{\circ}C$에서는 Cubic의 결정 구조를 보이며, Sheet Resistance가 급격히 증가한 400$^{\circ}C$, 500$^{\circ}C$에서는 Rhombohedral의 결정구조를 보인다. GeTe Thin Film은 400$^{\circ}C$ 이상의 Post-Annealing 온도에서 cubic 구조에서 Rhombohedral 구조로 상 변화가 일어난다. 위 결과를 통해, 결정 구조의 변화가 GeTe Thin Film의 저항, Carrier Concentration과 Mobility에 밀접한 영향이 미치는 것을 확인하였다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.129-129
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• 2003

최근에 능동 영역 액정 표시 소자(Active Matrix Liquid Crystal Display, AMLCD)에서 고해상도와 빠른 응답속도를 요구하게 되면서부터 다결정 실리콘(poly-Si) 박막 트랜지스터(Thin Film Transistor, TFT)가 쓰이게 되었다. 그리고 일반적으로 디스플레이의 기판을 상대적으로 저가의 유리를 사용하기 때문에 저온 공정이 필수적이다. 따라서 새로운 저온 결정화 방법과 부가적으로 최근 디스플레이 개발 동향 중 하나인 대화면에 적용 가능한 공정인 금속유도 결정화 (Silicide Mediated Crystallization, SMC)가 연구되고 있다. 이 소자는 top-gated coplanar구조로 설계되었다. (그림 1)(100) 실리콘 웨이퍼위에 3000$\AA$의 열산화막을 올리고, LPCVD로 55$0^{\circ}C$에서 비정질 실리콘(a-Si:H) 박막을 550$\AA$ 증착 시켰다. 그리고 시편은 SMC 방법으로 결정화 시켜 TEM(Transmission Electron Microscopy)으로 SMC 다결정 실리콘을 분석하였다. 그 위에 TFT의 게이트 산화막을 열산화막 만큼 우수한 TEOS(Tetraethoxysilane)소스로 사용하여 실리콘 산화막을 1000$\AA$ 형성하였고 게이트는 3000$\AA$ 두께로 몰리브덴을 스퍼터링을 통하여 형성하였다. 이 다결정 실리콘은 3$\times$10^15 cm^-2의 보론(B)을 도핑시켰다. 채널, 소스, 드래인을 정의하기 위해 플라즈마 식각이 이루어 졌으며, 실리콘 산화막과 실리콘 질화막으로 passivation하고, 알루미늄으로 전극을 형성하였다 그리고 마지막에 TFT의 출력특성과 전이특성을 측정함으로써 threshold voltage, the subthreshold slope 와 the field effect mobility를 계산하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.04b
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• pp.45-48
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• 2002

Poly(3-hexylthiophene) or P3HT based organic thin film transistor (OTFT) array was fabricated on flexible poly carbonate substrates and the electrical characteristics were investigated. As the gate dielectric, a dual layer structure of polyimide-$SiO_2$ was used to improve the roughness of $SiO_2$ surface and further enhancing the device performance and also source-drain electrodes were $O_2$ plasma treated for improvement of the electrical properties, such as drain current and field effect mobility. For the active layer, polymer semiconductor, P3HT layer was printed by contact-printing and spin-coating method. The electrical properties of OTFT devices printed by both methods were evaluated for the comparison. Based on the experiments, P3HT-based OTFT array with field effect mobility of 0.02~0.025 $cm^{2}/V{\cdot}s$ and current modulation (or $I_{on}/I_{off}$ ratio) of $10^{3}\sim10^{4}$ was fabricated.