• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.1
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• pp.144-154
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• 1996

Proposed numerous algorithms for the policing function have mainly focused on their performances. Besides their performance evaluation, however, the VLSI-implementation of these algorithms is worth consideration as well. Although, no algorithms for the policing function have been standardized up to now, ITU-T I.371 suggests two examples of algorithms, the Virtual Scheduling Algorithm (VSA) and the Continuous State Leaky Bucket algorithm. In this paper, we suggest the architecture of a policing device implementing the VSA among various algorithms for the peak cell rate policing and discuss some issues on the implementation. We also present how to select the policing modes of the two devices used to realize various policing schemes and show the experimental results obtained under four different peak cell rate values to confirm that the device performs the policing function satisfactorily. We exploit the priority encoder to run the algorithm in parallel instead of sequentially, which reduces the operation time to a great extent.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.12
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• pp.2157-2165
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• 2006

In implementing GCRA, well known as the representative user traffic policing algorithm for constant-bit rate service, it is essential to set proper values for delay variation tolerance in order to prevent network overload and excessive user data loss due to delay variation incurred inevitably during transmission process. In this paper, we investigate the performance of GCRA algorithm for various values of delay variation tolerance and suggest a guideline for setting proper delay variation tolerance values.

• The KIPS Transactions:PartC
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• v.9C no.3
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• pp.407-412
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• 2002

A FR-ATM interworking function that has FR and ATM interfaces, should guarantee the QoS of both frame relay and ATM networks. The IWF requires the policing mechanisms for FR and ATM respectively, and needs to map the traffic parameters each other. In this case, traffic parameter mapping and policing function are performed independently. In the aspect of FR traffic policing, this function degrades processor performance if it is worked by software, or includes additional hardware function. The best way to solve this is to integrate this function into ATM function because ATM is performed by well defined hardware already. In this paper we propose the integrated traffic control mechanism. That is, frames are segmented to cells first, and then policing mechanism is applied to the cells to guarantee the FR QoS. Therefore proper policing algorithm is essential to the integrated FR traffic mechanism. The evaluations are done with simulations in comparison of existing FR algorithms, ATM VBR and GFR policing algorithms, and the proposed algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.5
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• pp.931-940
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• 2001

In this paper, I propose Fuzzy Policing Mechanism(FPM) over ATM networks for the control of traffic which is unpredictable and bursty source. The FPM is consist of counter, subtracter and Fuzzy Logic Controller(FLC). The FLC is divided to fuzzifier, inference engine and defuzzifer The output of FLC inputs to the subtractor and it controls the counter. The counter works as a switch in transmission of cells. In simulation, I compared the FPM with the Leaky Bucket algorithm(LBM) in cell loss probability and performance characteristics. As a result, FPM gives lower cell loss probability than that of LBM and has good response behavior The FPM efficiently controls the transmission of packets which are variable traffic source and, it also has good selectivity.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.12
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• pp.1391-1400
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• 1992

In this paper, we suggested a method for evaluating the type-I/II error which is proposed by the CCITT as a criterion for the accuracy of policing algorithms in ATM networks, By the analysis of the type-I/II error of the Leaky Bucket(LB) algorithm, we investigated the relationships between the traffic parameters and the LB parameters to police the mean and peak cell rate effectively in the ON/OFF traffic. We showed that the LB parameters, the leaky rate a and the threshold M of the LB counter, could be determined as a pair of (a, M) satisfying the type-I/II error and minimizing the response time. In the ON/OFF traffic, it has been observed that the a-M characteristic curve of the LB policing algorithm only depends on the burstiness. As the results of the performance analysis, we found that the LB algorithm exhibits a good performance in the peak rate policing, but has some problems in the mean rate policing due to the trade-off between the accuracy and the response time.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.04b
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• pp.1157-1160
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• 2001

본 논문에서는 ATM 망에서 사용되고 있는 예방적 트래픽 제어 방법의 하나인, 사용 변수 제어(Usage Parameter Control)를 ATM 셀(Cell) 헤더(Header) 내에 있는 셀손실 우선 순위 정보(Cell Loss Priority Bit)를 기반으로 하는 개선된 UPC 알고리즘을 제안하고 그것을 구현하였다. 제안한 알고리즘은 우선순위가 높은 셀의 손실을 최소로 하고, 트래픽의 다중화 및 역다중화 과정에서 발생되는 트래픽의 군집성(Birstness of the traffic)을 해소할 수 있다는 장점을 갖고 있다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.181-189
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• 2001

In this thesis, a policing algorithm is proposed, which is one of the traffic management function in ATM networks. The proposed algorithm minimizes CLR(Cell Loss patio) of high priority cells and solves burstiness problem of the traffic caused by multiplexing and demultiplexing process. The proposed algorithm has been implemented with VHDL and is divided into three parts, which are an input module, an UPC module, and an output module. In implementation of the UPC module\`s memory access, memory address is assigned according to VCI\`s LSB(Lowest Significant Byte) of ATM header for convenience. And the error of VSA operation from counter\`s wrap-around can be recovered by the proposed method. ANAM library 0.25 $\mu\textrm{m}$ and design compiler of Synopsys are used for synthesis of the algorithm and Synopsys VSS tool is used for VHDL simulation of it

• ETRI Journal
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• v.18 no.4
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• pp.229-244
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• 1997

Realization of the economical, reliable, and efficient ATM interface block becomes an important key to development of the ATM switching system when we consider new issues raised recently. In this paper, we summarize requirements for the ATM interface block and present the UNI (User Network Interface)/NNI (Network Node Interface) architecture to meet these requirements. We also evaluate the performance of the multiplexer adopting the various multiplexing schemes and service disciplines. For ATM UNI/NNI interface technologies, we have developed a new policing device using the priority encoding scheme. It can reduce the decision time for policing significantly. We have also designed a new spacer that can space out the clumped cell stream almost perfectly. This algorithm guarantees more than 99 % conformance to the negotiated peak cell rate. Finally, we propose the interface architecture for accommodation of the ABR (Available Bit Rate) transfer capability. The proposed structure that performs virtual source and virtual destination functions as well as a switch algorithm can efficiently accommodate the ABR service.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.9B
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• pp.591-595
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• 2005

In this paper, we propose the fairness improvement leaky bucket (PILB) algorithm as a traffic policing mechanism. In the proposed algorithm, there is a cell buffer for every ATM connection in order to store date cells. Network decides whether an ATM connection obeys the contracted traffic parameter, and stores data cells in the cell buffer if the connection obeys but is considered as violated the contract due to temporary lack of network resource. By using the proposed algorithm, we can obtain the statistical multiplexing gain that is the superiority of packet switching network. Moreover, when a connection tries to transmit more data cells by violating the contracted traffic parameters, the connection is prevented from using excess network resource, which incurs all connections sharing network resource fairly. The performance of the proposed FILB algorithm is investigated by using the simulation. The result shows that the proposed algorithm provides superior performance and all connections within a group share network resource fairly. The proposed algorithm can be applied not only the ATM network but also IP network.

• The Journal of the Acoustical Society of Korea
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• v.19 no.1
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• pp.89-96
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• 2000

ABR service is defined by ATM Forum and ITU for the efficient use of link bandwidth, and 2-pass service policing is proposed for this service. 2-pass service policing is effective by the real-time measurement of the used bandwidth, and this scheme obtains multiplexing gam and control efficiently ABR traffic as dynamically allocating rate by residual bandwidth information. In this study, we propose the real-time bandwidth prediction scheme for ABR traffic control, as using dynamic rate allocation by available bandwidth information. This study can obtain the simple hardware structure by means of as predicting available bandwidth by the total link bandwidth and the sum of transmission rate on the backlogged state connections.