• Title/Summary/Keyword: Plasma Display

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Single-stage Power Factor Corrected AC-to-DC Converter for sustain/reset Driving Power Supply of PDP TV (PDP TV의 sustain/reset 구동전원 공급을 위한 1단방식의 역률보상형 AC-to-DC 컨버터)

  • Kang, Feel-Soon;Park, Jin-Hyun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.2
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    • pp.282-289
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    • 2008
  • To improve the efficiency of PDP TV, it should minimize the power losses transpired during AC-to-DC power conversion and PDP driving process. Generally the input power supply for PDP driving employes a two-stage power factor corrected converter, and it needs additional DC-to-DC converters to supply driving power for reset circuit ed sustain driver, which has high power consumption. However, such a circuit configuration has a difficulty for the PDP market requires low cost. To alleviate this problem, a new circuit composition is presented. It integrates input power supply with reset and sustain driver in a single power stack The input power supply of the proposed circuit has a single-stage structure to minimize power conversion loss, and it directly supplies power to the sustain driver so as to reduce the system size and cost.

Dielectric Characteristics due to the nano-pores of SiOCH Thin Flm (기공형성에 의한 SiOCH 박막의 유전 특성)

  • Kim, Jong-Wook;Park, In-Chul;Kim, Hong-Bae
    • Journal of the Semiconductor & Display Technology
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    • v.8 no.3
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    • pp.19-23
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    • 2009
  • We have studied dielectric characteristics of low-k interlayer dielectric materials was fabricated by plasma enhanced chemical vapor deposition (PECVD). BTMSM precursor was introduced with the flow rates from 24 sccm to 32 sccm by 2 sccm step in the constant flow rate of 60 sccm $O_2$. Then, SiOCH thin film deposited at room temperature was annealed at temperature of $400^{\circ}C$ and $500^{\circ}C$ for 30 minutes in vacuum. The vibrational groups of SiOCH thin films were analyzed by FT/IR absorption lines, and the dielectric constant of the low-k SiOCH thin films were obtained by measuring C-V characteristic curves. With the result that FTIR analysis, as BTMSM flow rate increase, relative carbon content of SiOCH thin film increased from 29.5% to 32.2%, and increased by 32.8% in 26 sccm specimen after $500^{\circ}C$ annealing. Dielectric constant was lowest by 2.32 in 26 sccm specimen, and decreased more by 2.05 after $500^{\circ}C$ annealing. Also, leakage current is lowest by $8.7{\times}10^{-9}A/cm^2$ in this specimen. In the result, shift phenomenon of chemical bond appeared in SiOCH thin film that BTMSM flow rate is deposited by 26 sccms, and relative carbon content was highest in this specimen and dielectric constant also was lowest value

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Interface Characteristics and Electrical Properties of SiO2 and V2O5 Thin Films Deposited by the Sputtering (스퍼터링 방법으로 증착한 SiO2와 V2O5박막의 전류특성과 계면분석)

  • Li, Xiangjiang;Oh, Teresa
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.4
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    • pp.66-69
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    • 2018
  • This study was researched the electrical properties of semiconductor devices such as ITO, $SiO_2$, $V_2O_5$ thin films. The films of ITO, $SiO_2$, $V_2O_5$ were deposited by the rf magnetron sputtering system with mixed gases of oxygen and argon to generate the plasma. All samples were cleaned before deposition and prepared the metal electrodes to research the current-voltage properties. The electrical characteristics of semiconductors depends on the interface's properties at the junction. There are two kinds of junctions such as ohmic and schottky contacts in the semiconductors. In this study, the ITO thin film was shown the ohmic contact properties as the linear current-voltage curves, and the electrical characteristics of $SiO_2$ and $V_2O_5$ films were shown the non-linear current-voltage curves as the schottky contacts. It was confirmed that the electronic system with schottky contacts enhanced the electronic flow owing to the increment of efficiency and increased the conductivity. The schottky contact was only defined special characteristics at the semiconductor and the interface depletion layer at the junction made the schottky contact which has the effect of leakage current cutoff. Consequently the semiconductor device with shottky contact increased the electronic current flow, in spite of depletion of carriers.

Glass strengthening and coloring using PIIID technology

  • Han, Seung-Hee;An, Se-Hoon;Lee, Geun-Hyuk;Jang, Seong-Woo;Whang, Se-Hoon;Yoon, Jung-Hyeon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.178-178
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    • 2016
  • Every display is equipped with a cover glass to protect the underneath displaying devices from mechanical and environmental impact during its use. The strengthened glass such as Gorilla glass.$^{TM}$ has been exclusively adopted as a cover glass in many displays. Conventionally, the strengthened glass has been manufactured via ion-exchange process in wet salt bath at high temperature of around $500^{\circ}C$ for hours of treatment time. During ion-exchange process, Na ions with smaller diameter are substituted with larger-diameter K ions, resulting in high compressive stress in near-surface region and making the treated glass very resistant to scratch or impact during its use. In this study, PIIID (plasma immersion ion implantation and deposition) technique was used to implant metal ions into the glass surface for strengthening. In addition, due to the plasmonic effect of the implanted metal ions, the metal-ion implanted glass samples got colored. To implant metal ions, plasma immersion ion implantation technique combined with HiPIMS method was adopted. The HiPIMS pulse voltage of up to 1.4 kV was applied to the 3" magnetron sputtering targets (Cu, Ag, Au, Al). At the same time, the sample stage with glass samples was synchronously pulse-biased via -50 kV high voltage pulse modulator. The frequency and pulse width of 100 Hz and 15 usec, respectively, were used during metal ion implantation. In addition, nitrogen ions were implanted to study the strengthening effect of gas ion implantation. The mechanical and optical properties of implanted glass samples were investigated using micro-hardness tester and UV-Vis spectrometer. The implanted ion distribution and the chemical states along depth was studied with XPS (X-ray photo-electron spectroscopy). A cross-sectional TEM study was also conducted to investigate the nature of implanted metal ions. The ion-implanted glass samples showed increased hardness of ~1.5 times at short implantation times. However, with increasing the implantation time, the surface hardness was decreased due to the accumulation of implantation damage.

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Improvement of Hysteresis Characteristics of Low Temperature Poly-Si TFTs (저온 Poly-Si TFT 소자의 Hysteresis 특성 개선)

  • Chung, Hoon-Ju;Cho, Bong-Rae;Kim, Byeong-Koo
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.2 no.1
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    • pp.3-9
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    • 2009
  • Although Active matrix organic light emitting diode (AMOLED) display has a better image quality in terms of viewing angle, contrast ratio, and response time than liquid crystal displays (LCDs), it still has some critical issues such as lifetime, residual images, and brightness non-uniformity due to non-uniformity in electrical characteristics of driving TFTs and IR drops on supplied power line. Among them, we improved irrecoverable residual images of AMOLED displays which is mainly related to the hysteresis characteristics of driving TFTs. We consider four kinds of surface treatment conditions before gate oxide deposition for improving hysteresis characteristics. We can reduce the hysteresis level of p-channel TFT to 0.23 V, interface trap states between the poly-Si layer and gate insulator to $3.11{\times}10^{11}cm^{-2}$, and output current variation of p-channel TFT to 3.65 % through the surface treatment using ultraviolet light and H2 plasma. Therefore, the recoverable residual image problem of AMOLED displays can be improved by surface treatment using ultraviolet light and $H_2$ plasma.

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BST Thin Film Multi-Layer Capacitors

  • Choi, Woo Sung;Kang, Min-Gyu;Ju, Byeong-Kwon;Yoon, Seok-Jin;Kang, Chong-Yun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.319-319
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    • 2013
  • Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

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Influence of gate insulator treatment on Zinc Oxide thin film transistors.

  • Kim, Gyeong-Taek;Park, Jong-Wan;Mun, Yeon-Geon;Kim, Ung-Seon;Sin, Sae-Yeong
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.54.2-54.2
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    • 2010
  • 최근까지는 주로 비정질 실리콘이 디스플레이의 채널층으로 상용화 되어왔다. 비정질 실리콘 기반의 박막 트랜지스터는 제작의 경제성 및 균일성을 가지고 있어서 널리 상용화되고 있다. 하지만 비정질 실리콘의 구조적인 문제인 낮은 전자 이동도(< $1\;cm^2/Vs$)로 인하여 디스플레이의 대면적화에 부적합하며, 광학적으로 불투명한 특성을 갖기 때문에 차세대 디스플레이의 응용에 불리한 점이 있다. 이런 문제점의 대안으로 현재 국내외 여러 연구 그룹에서 산화물 기반의 반도체를 박막 트랜지스터의 채널층으로 사용하려는 연구가 진행중이다. 산화물 기반의 반도체는 밴드갭이 넓어서 광학적으로 투명하고, 상온에서 증착이 가능하며, 비정질 실리콘에 비해 월등히 우수한 이동도를 가짐으로 디스플레이의 대면적화에 유리하다. 특히 Zinc Oxide의 경우, band gap이 3.4eV로써, transparent conductors, varistors, surface acoustic waves, gas sensors, piezoelectric transducers 그리고 UV detectors 등의 많은 응용에 쓰이고 있다. 또한, a-Si TFTs에 비해 ZnO-based TFTs의 경우 우수한 소자 성능과 신뢰성을 나타내며, 대면적 제조시 우수한 균일성 및 낮은 생산비용이 장점이다. 그러나 ZnO-baesd TFTs의 경우 일정한 bias 아래에서 threshold voltage가 이동하는 문제점이 displays의 소자로 적용하는데 매우 중요하고 문제점으로 여겨진다. 특히 gate insulator와 channel layer사이의 interface에서의 defect에 의한 charge trapping이 이러한 문제점들을 야기한다고 보고되어진다. 본 연구에서는 Zinc Oxide 기반의 박막 트랜지스터를 DC magnetron sputtering을 이용하여 상온에서 제작을 하였다. 또한, $Si_3N_4$ 기판 위에 electron cyclotron resonance (ECR) $O_2$ plasma 처리와 plasma-enhanced chemical vapor deposition (PECVD)를 통하여 $SiO_2$ 를 10nm 증착을 하여 interface의 개선을 시도하였다. 그리고 TFTs 소자의 출력 특성 및 전이 특성을 평가를 하였고, 소자의 field effect mobility의 값이 향상을 하였다. 또한 Temperature, Bias Temperature stability의 조건에서 안정성을 평가를 하였다. 이러한 interface treatment는 안정성의 향상을 시킴으로써 대면적 디스플레의 적용에 비정질 실리콘을 대체할 유력한 물질이라고 생각된다.

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Influence of Growth Temperature for Active Layer and Buffer Layer Thickness on ZnO Nanocrystalline Thin Films Synthesized Via PA-MBE

  • Park, Hyunggil;Kim, Younggyu;Ji, Iksoo;Kim, Soaram;Lee, Sang-Heon;Kim, Jong Su;Leem, Jae-Young
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.203.1-203.1
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    • 2013
  • Zinc oxide (ZnO) nanocrystalline thin films on various growth temperatures for active layer and different buffer layer thickness were grown by plasma-assisted molecular beam epitaxy (PA-MBE) on Si substrates. The ZnO active layer were grown with various growth temperature from 500 to $800^{\circ}C$ and the ZnO buffer layer were grown for different time from 5 to 40 minutes. To investigate the structural and optical properties of the ZnO thin films, scanning electron microscope (SEM), X-ray diffractometer (XRD), and photoluminescence (PL) spectroscopy were used, respectively. In the SEM images, the ZnO thin films have high densification of grains and good roughness and uniformity at $800^{\circ}C$ for active layer growth temperature and 20 minutes for buffer layer growth time, respectively. The PL spectra of ZnO buffer layers and active layers display sharp near band edge (NBE) emissions in UV range and broad deep level emissions (DLE) in visible range. The intensity of NBE peaks for the ZnO thin films significantly increase with increase in the active layer growth temperature. In addition, the NBE peak at 20 minutes for buffer layer growth time has the largest emission intensity and the intensity of DLE peaks decrease with increase in the growth time.

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Halogen-based Inductive Coupled Plasma에서의 W 식각시 첨가 가스의 효과에 관한 연구

  • 박상덕;이영준;염근영;김상갑;최희환;홍문표
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2003.05a
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    • pp.41-41
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    • 2003
  • 텅스텐(W)은 높은 thermal stability 와 process compatibility 및 우수한 corrosion r resistance 둥으로 integrated circuit (IC)의 gate 및 interconnection 둥으로의 활용이 대두되고 있으며, 차세대 thin film transistor liquid crystal display (TFT-LCD)의 gate 및 interconnection m materials 둥으로 사용되고 았다. 그러나, 이러한 장점을 가지고 있는 팅스텐 박막이 실제 공정상에 적용되가 위해서는 건식 식각이 주로 사용되는데, 이는 wet chemical 을 이용한 습식 식각을 사용할 경우 낮은 etch rate, line width 의 감소 및 postetch residue 잔류 동의 문제가 발생하기 때문이다. 또한 W interconnection etching 을 하기 위해서는 높은 텅스텐 박막의 etch rate 과 하부 layer ( (amorphous silicon 또는 poly-SD와의 높은 etch selectivity 가 필수적 이 라 할 수 있다. 그러 나, 지금까지 연구되어온 결과에 따르면 텅스탠과 하부 layer 와의 etch selectivity 는 2 이하로 매우 낮게 관찰되고 았으며, 텅스텐의 etch rate 또한 150nm/min 이하로 낮은 값을 나타내고 있다. 따라서 본 연구에서는 halogen-based inductively coupled plasma 를 이용하여 텅스텐 박막 식각시 여러 가지 첨가 가스에 따른 높은 텅스탠 박막의 etch rate 과 하부 layer 와의 높은 etch s selectivity 를 얻고자 하였으며, 그에 따른 식각 메커니즘에 대하여 알아보고자 하였다. $CF_4/Cl_2$ gas chemistry 에 첨 가 가스로 $N_2$와 Ar을 첨 가할 경 우 텅 스텐 박막과 하부 layer 간의 etch selectivity 증가는 관찰되지 않았으며, 반면에 첨가 가스로 $O_2$를 사용할 경우, $O_2$의 첨가량이 증가함에 따라 etch s selectivity 는 계속적으로 증가렴을 관찰할 수 있었다. 이는 $O_2$ 첨가에 따라 형성되는 WOF4 에 의한 텅스텐의 etch rates 의 감소에 비하여, $Si0_2$ 등의 형성에 의한 poly-Si etch rates 이 더욱 크게 감소하였기 때문으로 사료된다. W 과 poly-Si 의 식각 특성을 이해하기 위하여 X -ray photoelectron spectroscopy (XPS)를 사용하였으며, 식각 전후의 etch depth 를 측정하기 위하여 stylus p pmfilometeT 를 이용하였다.

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Fabrication and Evaluation of Al Targets using the SPS Technique and their Sputter Fabricated Films (방전플라즈마 소결법에 의해 제조된 Al 타겟과 스퍼터링 박막의 특성평가)

  • Hyun, Hye Young;Kim, Min Jung;Yoo, Jung Ho;Jeong, Chil Seong;Yang, Jun-Mo;Oh, Ik Hyun;Park, Hyun-Kuk;Lee, Seung Min;Oh, Yong Jun
    • Korean Journal of Metals and Materials
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    • v.49 no.6
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    • pp.493-497
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    • 2011
  • The basic properties and electrical characteristics of sputtering films deposited with a commercial cast target and spark plasma sintering (SPS) were compared and analyzed. The results, revealed that, the Al film prepared by heating at $60^{\circ}C/min$ (SPS process) showed a specific resistance similar to the commercial cast Al film. In addition, the results of XRD, SIMS and TEM, showed that there was not much difference in the crystal structure and impurities between the two films. Consequently, the SPS Al target was found to have properties quite similar to the commercial one and it is expected to be applied in future research to the metal wiring material for semiconductor/display devices.