• 제목/요약/키워드: Planar Device

검색결과 243건 처리시간 0.036초

Effect of Shield Line on Noise Margin and Refresh Time of Planar DRAM Cell for Embedded Application

  • Lee, Jung-Hwan;Jeon, Seong-Do;Chang, Sung-Keun
    • ETRI Journal
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    • 제26권6호
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    • pp.583-588
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    • 2004
  • In this paper we investigate the effect of a shield metal line inserted between adjacent bit lines on the refresh time and noise margin in a planar DRAM cell. The DRAM cell consists of an access transistor, which is biased to 2.5V during operation, and an NMOS capacitor having the capacitance of 10fF per unit cell and a cell size of $3.63{\mu}m^2$. We designed a 1Mb DRAM with an open bit-line structure. It appears that the refresh time is increased from 4.5 ms to 12 ms when the shield metal line is inserted. Also, it appears that no failure occurs when $V_{cc}$ is increased from 2.2 V to 3 V during a bump up test, while it fails at 2.8 V without a shield metal line. Raphael simulation reveals that the coupling noise between adjacent bit lines is reduced to 1/24 when a shield metal line is inserted, while total capacitance per bit line is increased only by 10%.

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사각 나선형 평면 인덕터의 주파수 특성에 관한 연구 (Study on Frequency Characteristics of Rectangle Spiral Planar Inductor)

  • 김재욱
    • 한국산학기술학회논문지
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    • 제15권4호
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    • pp.2330-2334
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    • 2014
  • 본 논문에서는 무선 신호전송을 위한 비접촉 방식의 AC커플링(Coupling)기반 평면 나선형 인덕터의 주파수 특성을 분석하였다. 기판의 유전상수의 변화는 소자의 인덕턴스에 직접적인 영향을 주지 않고 소자의 전기용량에 영향을 주어 공진주파수를 변화시키는 것을 알 수 있다. 기판의 두께가 증가할수록 인덕턴스는 증가하지만 공진주파수는 감소하였으며, 이것은 기판 두께의 감소로 인해 내부 전기용량이 증가하였기 때문이다. 인덕터의 도체 선 폭이 증가하여도 전체 인덕터 크기와 턴 수 및 선 간격이 일정함으로 내부 사각 코일의 도선 면적이 작아지게 되어 각각의 자기 인덕턴스가 감소하게 되고 공진주파수는 증가되게 된다. 또한, 도체의 선 간격이 증가하면 내부 사각 코일의 도선 면적이 작아지게 된다.

Planar 변압기와 무손실 스너버를 사용한 포워드 컨버터 (Forward Converter using Planar transformer and Lossless Snubber)

  • 박경수;이재학;김춘삼;김윤호
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.480-484
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    • 1999
  • In this paper, a design technique of SMPS using plannar transformer is described. The application of plannar transformer can solve the space problem which occurs when it is installed on PCB since plannar transformer has low profile. In addition a lossless snubber circuit added to reduce the device stress and to improve the system efficiency. The designed system is verifed by simulation and experiment with comparison of efficiency between the system using conventional transformer and the system using plannar transformer.

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평면형 GaInAs/InP PIN Photodiode 제작 및 특성 (Fabrication of planar type GaInAs PIN photodiode and its characteristics)

  • 박찬용
    • 한국광학회:학술대회논문집
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    • 한국광학회 1991년도 제6회 파동 및 레이저 학술발표회 Prodeedings of 6th Conference on Waves and Lasers
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    • pp.135-138
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    • 1991
  • A planar type PIN photodiode has been fabricated and discussed. We used OMVPE systems to grow the structure of u-InP/u-InP/n-InP. P-n junction was formed by Zn-diffusion method at 50$0^{\circ}C$, for 5 minitues. The device characteristics at 5V were as follows: Dark currents were distributed around 1nA. Capacitance was 1.6pF and responsivity was above 0.85 mA/mW for 1.3${\mu}{\textrm}{m}$ wavelength. Measured cut-off frequency(-3dB) at -5V was 1.1㎓.

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SPM의 동적해석 S/W 개발 (Development of SPM Dynamic Analysis Software)

  • 이문성;김진석;조철희;홍성근;정광식
    • 한국해양공학회:학술대회논문집
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    • 한국해양공학회 2000년도 추계학술대회 논문집
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    • pp.84-89
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    • 2000
  • Thermal simulation of typical stack-type and newly proposed planar-type micro-gas sensors were studied by FEM method. The thermal analyses for the proposed planar structure including temperatur distribution over the sensing layer and power consumption of the heater were carried using finite element method by computer simulation and well compared with those of typical stack-type micro-gas sensor. The thermal properties of the microsensor from thermal simulation were compared with those of a actual device to investigate the acceptability of the computer simulation.

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전계방출 광원용 플라나 게이트의 구동 특성 연구 (Study on the Driving property of planar gate light source)

  • 김광복;양동욱;김태현;김대준
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2008년도 춘계학술대회 논문집
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    • pp.148-150
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    • 2008
  • In this paper, we report the improved driving methode using planar-gate for field emission light source. Due to the cold cathode in field emission device, it has advantage for driving system in terms of high speed pulse driving with narrow duty ratio. This paper shows that our driving method offers the stable and reliable driving system without rapid electric field variation for field emission light source.

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플레나 및 이방성 에칭 구조를 갖는 실리콘 p-i-n 광 스위치 (Optically-Triggered Silicon P-I-N Switches with Planar and Anistropically-Etched Structures)

  • 민남기;이성재
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 C
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    • pp.1261-1263
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    • 1997
  • Two kinds of optically-triggered p-i-n switches with planar and V-groove structures have been fabricated with gold-doped silicon. The V-groove device exhibits a higher threshold voltage and is more sensitive to light. The minimum optical power indicates that a certain minimum illumination is required to optically turn on the silicon p-i-n devices.

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Ag$^{+}$ -Na$^{+}$이온교환법을 이용한 BK7 유리 평판형 광도파로의 특성 (Characterization of Planar Optical Waveguides by Ag$^{+}$ -Na$^{+}$ Ion Exchange in BK7 Glass)

  • 전금수;반재경
    • 전자공학회논문지D
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    • 제35D권1호
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    • pp.84-93
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    • 1998
  • Planar graded index optical waveguides have been formed by Ag$^{+}$ ion exchange in the BK7 optical glass. The experimental results of diffusion and modal characteristics of Ag$^{+}$-Na$^{+}$ exchanged BK7 glass waveguides are presented. Measurements of the mode indices have been measured. We found the relations between the process and device parameters such as the diffusion depth and the square root of the diffusion time, diffusion coefficient and diffusion temperature, and diffusion ion concentration and surface index change. A theoretical gaussian function refractive index profile matched best with the measured data for all the guided modes. The empirical relations between the process and the device parameters are derived and subsequently used to formulate a systematic procedure for fabricating singlemode and multimode waveguides.uides.

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낮은 온저항과 칩 효율화를 위한 Unified Trench Gate Power MOSFET의 설계에 관한 연구 (Design of Unified Trench Gate Power MOSFET for Low on Resistance and Chip Efficiency)

  • 강이구
    • 한국전기전자재료학회논문지
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    • 제26권10호
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    • pp.713-719
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    • 2013
  • Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have optimal designed planar and trench gate power MOSFET for high breakdown voltage and low on resistance. When we have designed $6,580{\mu}m{\times}5,680{\mu}m$ of chip size and 20 A current, on resistance of trench gate power MOSFET was low than planar gate power MOSFET. The on state voltage of trench gate power MOSFET was improved from 4.35 V to 3.7 V. At the same time, we have designed unified field limit ring for trench gate power MOFET. It is Junction Termination Edge type. As a result, we have obtained chip shrink effect and low on resistance because conventional field limit ring was convert to unify.

Epitaxial Layer Design for High Performance GaAs pHEMT SPDT MMIC Switches

  • Oh, Jung-Hun;Mun, Jae-Kyoung;Rhee, Jin-Koo;Kim, Sam-Dong
    • ETRI Journal
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    • 제31권3호
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    • pp.342-344
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    • 2009
  • From a hydrodynamic device simulation for the pseudomorphic high electron mobility transistors (pHEMTs), we observe an increase of maximum extrinsic transconductance and a decrease of source-drain capacitances. This gives rise to an enhancement of the switching speed and isolation characteristics as the upper-to-lower planar-doping ratios (UTLPDR) increase. On the basis of simulation results, we fabricate single-pole-double-throw transmitter/receiver monolithic microwave integrated circuit (MMIC) switches with the pHEMTs of two different UTLPDRs (4:1 and 1:2). The MMIC switch with a 4:1 UTLPDR shows about 2.9 dB higher isolation and approximately 2.5 times faster switching speed than those with a 1:2 UTLPDR.

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