• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.2
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• pp.280-286
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• 2007

In this paper, the phase noise effects of OFDM transceiver diversity systems were analyzed. Since OFDM communication system is very sensitive to phase noise, the system performance may degrade seriously due to the increase of subcarrier interferences and system noise. Therefore, the phase noise model was suggested and its distribution and power were varied to investigate the effects of phase noise on the system performance. The degree of the system performance degradation depends on the specific diversity structures of transceiver systems. Here, the performances of OFDM systems with two antennas transceiver diversity were analyzed and compared with that of systems with only transmission diversity and without diversity as the phase noise characteristics varied.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.10
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• pp.1894-1898
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• 2007

Conventional 3-phase AC-DC converter is frequently in the industrial world. In this paper, the high power factor 3-phase AC-DC converter which can reduce its weight and volume is proposed. The high power factor 3-phase AC-DC converter without LC filter can realize light weight and low-cost. In spite of elimination of LC filter, the performance of the high power 3-phase AC-DC converter is almost the same as conventional 3-phase AC-DC converter. Finally, this result can be expected to be applied to aviation and the space industry with high power density and high power factor.

• Transactions of the Society of Information Storage Systems
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• v.1 no.1
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• pp.93-98
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• 2005

Rewritable optical disk is one of the essential data storage media in these days, which takes advantage of the different optical properties in the amorphous and crystalline states of phase change materials. As well known, data transfer rate is one of the most important parameter of the phase change optical disks, which is mostly limited by the crystallization speed of recording media. Therefore, we doped Sn/Bi to $Ge_2Sb_2Te_5$ alloy in order to improve the crystallization speed and investigated the dependence of phase change characteristics on Sn/Bi doping concentration. The Sn/Bi doped $Ge_2Sb_2Te_5$ thin film was deposited by RF magnetron co-sputtering system and phase change characteristics were investigated by X-ray diffraction (XRD), static tester, UV-visible spectrophotometer, electron probe microanalysis (EPMA), inductively coupled plasma mass spectrometer (ICP-MS) and atomic force microscopy (AFM). Optimum doping concentration of Bi and Sn were 5${\~}$6 at.$\%$ and the minimum time for crystallization was below than 20 ns. This improvement is correlated with the simple crystalline structure of Sn/Bi doped $Ge_2Sb_2Te_5$ and the reduced activation barrier arising from Sn/Bi doping. The results indicate that Sn/Bi might play an important role in the transformation kinetics of phase change materials..

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.05a
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• pp.119-121
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• 2022

In this paper, we will make a model that finds optimal phase for each crossroad. When the traffic volume, traffic capacity, and the lane width of every direction is given for each crossroad, we aim to find the most efficient phase. We established an evaluation function that evaluates the efficiency of each phase using the values of the average waiting time in one direction, the average delay time, the standard deviation of the delay time, and the average delay time in each direction. The time allocation to optimize a phase pattern can be obtained by using the gradient decent method. Through this research, we hope to decrease the waiting time in transporation, thus improving the overall traffic condition in cities.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.352-358
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• 2016

A 5-phase phase-locked loop (PLL) for USB2.0 applications was implemented by using an all-synthesis technique. The length of the time-to-digital converter for the fine phase detector was halved by the operation of a coarse phase detector that uses 5-phase clocks. The maximum time difference between the rising edges of two adjacent-phase clocks was 6 ps at 480 MHz. The PLL chip in a 65-nm process occupies $0.038mm^2$, consumes 4.8 mW at 1.2 V. The measured rms and peak-to-peak output jitters are 8.6 ps and 45 ps, respectively.

• Transactions on Electrical and Electronic Materials
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• v.5 no.4
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• pp.158-160
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• 2004

BiSrCaCuO thick films were fabricated by plasma enhanced chemical vapor deposition, and the crystallinity and the superconducting properties were investigated. The superconductivity was achieved at 20 K with an onset temperature of around 90 K in the film prepared at 72$0^{\circ}C$. From X ray diffraction analysis, the main superconducting phase in the films was the low Tc phase at 700∼75$0^{\circ}C$ and the high Tc phase at 750 ∼ 80$0^{\circ}C$.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.163-166
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• 1999

In this paper, frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop). For improving phase noise characteristic Voltage Controlled Oscillator was fabricated using coaxial resonator and eliminated frequency divider using SPD as phase detector and increased open loop gain. Fabricated frequency synthesizer had 1.82㎓ center frequency, 160MHz tuning range and -119.73㏈c/Hz low phase noise characteristic.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.825-828
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• 1999

In this paper, we design the analog phase shifter for the elimination of the ghost signal. Compensation of the delay between the reference signal and the relatively delayed signal is possible. This phase shifter uses the vector summing method. We use for the attenuator in our system FETs. The phase shifter is operated at the 200MHz and composed by lumped elements. The proposed analog phase shifter is simulated by the HP ADS software.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.617-620
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• 2003

In this paper, a monolithic VCO has been designed for Wireless Local Area Network(WLAN) applications. The differential form VCO is constructed using positive feedback with capacitor and phase shift for low phase noise performance. The VCO shows the phase noise of -92.725 dBc/Hz at an offset frequency of 10KHz and the tunning range of 5.822~6.154GHz.

• Proceeding of EDISON Challenge
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• 2014.03a
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• pp.169-182
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• 2014

이 연구에서는 Lennard-Jones (LJ) particle을 이용하여 상분리 현상을 이해하기 위한 컴퓨터 시뮬레이션 연구를 수행하였다. 초기에 균일하게 분포되어 있는 LJ 입자들을 시뮬레이션 하면 상대적으로 dense phase와 dilute phase로 상분리 현상이 일어나게 된다. 상분리 현상의 첫 번째 단계를 핵 생성 (nucleation) 이라고 한다. 본 연구에서는 Brownian Dynamics (BD) Simulation과 Molecular Dynamics (MD) Simulation을 이용하여 상평형 그림을 구하고 초기에 일어나는 LJ 입자들의 nucleation rates를 구하였다.