• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.9
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• pp.790-797
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• 2015

In this paper, We made the microwave polar transmitter based on the software to analyze the synchronization status between the phase signal and the amplitude signal of polar transmitter, and analyzed the result. In order to solve the time delay mismatch problem, we applied simplified compensation algorithm and compared the synchronization status between the two paths before and after compensation. Before compensation, the value of time delay mismatch was the maximum of 97 nsec at 9.3 GHz with the occupied bandwidth of 12 MHz, but after applying the compensation algorithm, the signals between the two paths were synchronized, and we identified the occupied bandwidth could recover to the previous 3.7 MHz.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2284-2293
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• 2016

With the rapid development of clean energy, photovoltaic (PV) generation has been utilized in the harmonic compensation of power systems. This paper presents a novel multi-function PV micro-inverter with three stages (pseudo-two-stage). It can inject active power and compensate harmonic currents in the power grid at the same time. In order to keep the micro-inverter working under the maximum allowable output power, an optimized capacity limitation strategy is presented. Moreover, the harmonic compensation can be adjusted according to the customized requirements of power quality. Additionally, a phase shedding strategy in the DC/DC stage is introduced to improve the efficiency of parallel Boost converters in a wide range. Compared with existing capacity limitation methods, the proposed strategy shows better performance and energy efficiency. Simulations and experiments verify the feasibility of the micro-inverter and the effectiveness of the strategy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.1
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• pp.25-29
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• 1984

The active compensation of operational amplifeir is that it compensates the phase shift and the attennation of gain of OP Amp, according as the frequency increases. The compensation circuit is applied to VCVS and interting integrator. For VCVS, the phase shift of proposed compensated circuit is not concern with the frequency and the gain chracteristic is better than the proposde circuit by Soliman, according as the rate of feedback resistors of compensated circuit changes. Voltage follower accomplishies compgnsation using the same circuit. Also, the compensation circuit to increase O-ffactor in inverting integrator is proposed.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.1
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• pp.1-7
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• 2014

This paper proposes a current harmonic compensation method for the grid-connected inverter, especially caused by the grid impedance. Grid impedance causes low order harmonics in the grid current and deteriorates power quality. This paper analyzes the negative impact of the grid impedance, and proposes an active feedforward compensation method. Proposing method verified through simulation and experiment with 3-phase 1.5kW voltage source inverter prototype.

• Journal of the Korean Society for Precision Engineering
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• v.14 no.5
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• pp.108-117
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• 1997

To prove the stability and the effectiveness of the robust non-linear friction control suggested and proved analytically in the previous paper, the describing function analysis is introduced. The instability of the Southward's nonlinear friction compensation for a digital position control and the improvement of phase margin of the robust nonlinear friction compensation are verified qualitatively through the describing function analysis. Those controls are applied to a single-axis digital servo driving experimental setup which has inherent stick-slip friction and experimental results confirm the results obtained in and the effectiveness of the robust nonlinear friction compensation for a digital position control.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.1
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• pp.155-162
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• 2020

In this paper, we present a radiation compensation method and experiment method for two-dimensional direction finding by elevation and azimuth angles of broadband GPS signal, and then produce experimental results. Previous studies have performed direction finding by only using the azimuth angle of the detected signal. So, the compensation table utilizes compensation data by azimuth angles only. However, the presented method in this study has compensation data by azimuth and elevation angles for two-dimensional direction finding. Because of direction finding systems and applications are diversified, recently. So, we present a two-dimensional radiation compensation method. For evaluation of the presented compensation method, we calculate the ideal phase differences on the antenna for two-dimensional direction finding and simulate phase differences using a FEKO EM simulator. Subsequently, we analyze experimental data by radiation compensation experiments using the presented compensation method in an anechoic chamber.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.11-19
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit which becomes more serious problem due to the thin gate oxide and small threshold voltage in nanometer CMOS technology and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9V power supply voltage. The simulation results show that the proposed PLL achieves a 88% jitter reduction at 440MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of $40M{\sim}725MHz$ with a multiplication range of 11023, and the RMS and peak-to-peak jitter are 5ps and 42.7ps, respectively.

• Journal of Advanced Navigation Technology
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• v.15 no.2
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• pp.248-255
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• 2011

An investigation has been carried out, by computer simulation, to evaluate the impact of dispersion compensation configurations on 960 Gbps wavelength division multiplexed (WDM) system with optical phase conjugator (OPC). The considered dispersion compensation configurations in this research are conventional one-end type and bi-end type. One-end and bi-end type are made by using one dispersion compensating fiber (DCF) and two DCFs to decrease dispersion accumulated in one single mode fiber (SMF) span, respectively. It is found that bi-end compensation configuration offers the equal performance with that of one-end configuration in WDM system with residual dispersion per span (RDPS) of 400 ps/nm if net residual dispersion (NRD) had to be optimized in each cases.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.166-174
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• 2017

This study proposes a compensation method for the dead-time effects on a single-phase grid-connected inverter. Dead time should be considered in the pulse-width modulation gating signals to prevent the simultaneous conduction of switching devices, considering that a switching device has a finite switching time. Consequently, the output current of the grid-connected inverter contains odd-numbered harmonics because of the dead time and the nonlinear characteristics of the switching devices. The effects of dead time on output voltage and current are analyzed in this study. A new compensation algorithm based on second-order generalized integrator is also proposed to reduce the dead-time effect. Simulation and experimental results validate the effectiveness of the proposed compensation algorithm.

• Journal of Institute of Control, Robotics and Systems
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• v.19 no.3
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• pp.195-201
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• 2013

In this paper, we present optimization technique for the response time of DVR (Dynamic Voltage Restorer) and the possible compensation range of voltage dip by the DVR system. To protect 3-phase phase-controlled rectifier from voltage dip, DVR system needs to have optimum response time as an important design factor. Although the fast response time of DVR ensures wider range of voltage dip, DVR controller has so high cost and poor stability. This paper proposes DVR system with optimum response time required for certain intensity of voltage dips and good stability to support possible compensation range of voltage dip. Proposed technique showed optimum response time and good stability for overall system. We believe that proposed technique is reliable and useful in DVR design.