• ETRI Journal
• /
• v.33 no.4
• /
• pp.528-536
• /
• 2011

In this paper, we analyze the location accuracy of real-time locating systems (RTLSs) in multipath environments in which the RTLSs comply with the ISO/IEC 24730-2 international standard. To analyze the location error of RTLS in multipath environments, we consider a direct path and indirect path, in which time and phase are delayed, and also white Gaussian noise is added. The location error depends strongly on both the noise level and phase difference under a low signal-to-noise ratio (SNR) regime, but only on the noise level under a high SNR regime. The phase difference effect can be minimized by matching it to the time delay difference at a ratio of 180 degrees per 1 chip time delay (Tc). At a relatively high SNR of 10 dB, a location error of less than 3 m is expected at any phase and time delay value of an indirect signal. At a low SNR regime, the location error range increases to 8.1 m at a 0.5 Tc, and to 7.3 m at a 1.5 Tc. However, if the correlation energy is accumulated for an 8-bit period, the location error can be reduced to 3.9 m and 2.5 m, respectively.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.7 no.4
• /
• pp.241-246
• /
• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9 V power supply voltage. The simulation results show that the proposed PLL achieves 88% jitter reduction at 440 MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of 40 $M{\sim}725$ MHz with a multiplication range of 1-1023, and the RMS and peak-to-peak jitter are 5psec and 42.7 psec, respectively.

• Journal of the Optical Society of Korea
• /
• v.14 no.2
• /
• pp.90-96
• /
• 2010

Joint transform correlator (JTC) has been the most suitable technique for real time pattern recognition. This paper proposes a new phase adjustment which adopts two steps of random phase adjustment in the spatial domain and additional phase adjustment in the Fourier domain. Simulated results are presented to show the optimum condition of the phase adjustment and the effect on the correlation peaks, the peak signal-to-noise ratio and the level of discrimination.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.14 no.8
• /
• pp.809-815
• /
• 2003

It is very important to get very high switching speed as well as low phase noise of frequency synthesizer in the OFDM/FH communication system. In this paper we compare the phase noises and switching speeds of the conventional PLL and digital hybrid PLL(DH-PLL) frequency synthesizer, also, we investigate the effect of phase noise on the performance of OFDM/FH communication system. DH-PLL has high switching speed property at the cost of circuit complexity and more power consumption. Unlike the conventional PLL in which the phase noise and switching speed have the trade off relationship in respect of loop filter bandwidth, DH-PLL frequency synthesizer can perform fast switching speed and low phase noise simultaneously. Under the condition of same hopping speed requirement, DH-PLL can achieve faster switching speed and lower SNR penalty compared with conventional PLL in the OFDM/FH communication system.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.13 no.5
• /
• pp.775-784
• /
• 2010

In this paper we propose a design method of X band frequency hopping synthesizer in terms of phase noise and settling time with DDS driven PLL architecture, which has the advantages of high frequency resolution, fast settling time and small size. In addition, a noble method is proposed to remove the synthesizer output spurious signals due to superposition effect of DDS. The spurious signal which depend on its normalized frequency of DDS, can be dominant if they occur within the PLL loop bandwidth. We verify that the sources of that spurious signals are quasi-amplitude modulation and superposition effect, and suggest that such signals can be eliminated by intentionally creating frequency errors in the developed synthesizer.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.21 no.3
• /
• pp.6-12
• /
• 1984

The basic binary quantized first-order digital phase locked loop (DPLL) is modified in order to reduce the aquisition time and steadyftate phase error. Adding the loop that corrects the phase difference by detecting the falling zero-crossing time, an effort for the improving the performance is performed and the performance compared with that of the basic DPLL. Using a graphical method, the phase locking processes of the modified DPLL for a phase step and a frequency step input are depicted visually in the absence of noise. The performance of the modified DPLL for a sinusoidal input added narrow band random noise is evaluated using the Chapman-Kolmogorov equation. This approach is verified by direct computer simulation. The steady-state phase error and the average aquisition time of the modified DPLL are compared with those of the basic DPLL, It is shown that the aquisition time of the modified DPLL is shortened about twice, also, as signal to noise ratio increases, the effect of the modification increases and the steady-state phase error approaches to zero.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.21 no.11
• /
• pp.1275-1284
• /
• 2010

100 MHz bandwidth and 1 Gbit/s data speed are needed in LTE-advanced for the next generation mobile communication system. Therefore, spectrum aggregation method has been studied recently to extend usable frequency bands. Also bandwidth utilization is increased since vacant frequencies are used to communicate. However, transceiver structure requires the digital RF and SDR. Therefore, frequency synthesizer and PA must operate over wide-bandwidth and RF impairments also increases in transceiver. Uplink of LTE advanced uses DFT-S OFDM using plural power amplifier. The effect of ICI increases in frequency domain of receiver due to phase noise and IQ imbalance. In this paper, we analyze influences of ICI in frequency domain of receiver considering phase noise and IQ imbalance in multiband system. Also, we separate phase noise and IQ imbalance effect from channel response in frequency domain of uplink system. And we propose a method to estimate the channel exactly and to compensate IQ imbalance and phase noise. Simulation result shows that the proposed method achieves the 2 dB performance gain of BER=$10^{-4}$.

• Transactions of the Korean Society for Noise and Vibration Engineering
• /
• v.11 no.9
• /
• pp.439-453
• /
• 2001

This study deals with the free vibration of two identical circular plates coupled with a bounded fluid. An analytical method based on the finite Fourier-Bessel series expansion and Rayleigh-Ritz method is suggested. In the theory, it is assumed that the ideal fluid in a rigid cylindrical container and the two plates are clamped along the plate edges. The proposed method is verified by the finite element analysis using commercial program with a good accuracy. Two transverse vibration modes, namely in-phase and out-of-phase, are observed alternately in the fluid-coupled system when the number of nodal circles increases for the fixed nodal diameter. The effect of gap between the plates on the fluid-coupled natural frequencies sis also investigated.

• Journal of KSNVE
• /
• v.9 no.3
• /
• pp.600-606
• /
• 1999

A reactive type acoustic filter is developed based on the phase cancellation effect which is occurring in the plane wave propagation through the two paths where the cross sectional areas are reversely changing. The theory is experimentally validated by the use of a cylindrical duct and an inserted hollowed cone of which vertex part is eliminated. Noise attenuation and the filtered frequency are dependent on the area variation and the effective length of the filter. Experimental comparison shows that the filtered frequencies of 1st and 2nd mode are lower than the analytical prediction due to the mass loading effects, and the 3rd mode is in good agreement. The proposed filter can be applied as an in-duct noise filter for improving the sound quality in a narrow space for various industrial applications.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.13 no.5
• /
• pp.2357-2380
• /
• 2019

In this paper, we investigate the impact of hardware impairments (HWIs) on the performance of a downlink massive MIMO system. We consider a single-cell system with maximum ratio transmission (MRT) as precoding scheme, and with all the HWIs characteristics such as phase noise, distortion noise, and amplified thermal noise. Based on the system model, we derive closed-form expressions for a typical user data rate under two scenarios: when a common local oscillator (CLO) is used at the base station and when separated oscillators (SLOs) are used. We also derive closed-form expressions for the downlink transmit power required for some desired per-user data rate under each scenario. Compared to the conventional system with ideal transceiver hardware, our results show that impairments of hardware make a finite upper limit on the user's downlink channel capacity; and as the number of base station antennas grows large, it is only the hardware impairments at the users that mainly limit the capacity. Our results also show that SLOs configuration provides higher data rate than CLO at the price of higher power consumption. An approach to minimize the effect of the hardware impairments on the system performance is also proposed in the paper. In our approach, we show that by reducing the cell size, the effect of accumulated phase noise during channel estimation time is minimized and hence the user capacity is increased, and the downlink transmit power is decreased.