• 한국정보통신학회논문지
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• 제16권11호
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• pp.2480-2486
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• 2012

본 논문에서는 WCDMA(Wide Code Division Multiple Access) 시스템 사양을 만족시키는 주파수 합성기 블록 중 위상잡음 및 전력소모의 최적 설계가 필요한 저전압 LC-VCO (voltage controlled oscillator)의 설계를 제안 하였다. 최적 설계를 위해 LC-tank의 손실성분을 보상하는 MOS트랜지스터의 전달컨덕턴스와 인덕턴스 평면에 여유이득 라인과 튜닝 범위 라인을 그어 설계 가능한 영역 내에서 위상잡음이 최소가 되는 파라미터 값을 구하였다. 모의실험 결과 위상잡음 특성은 1MHz옵셋에서 -113dBc/Hz였다. 최적 설계된 LC-VCO는 0.25um CMOS 공정을 이용하여 제작되었다. 칩 측정결과 LC-VCO의 위상잡음 특성은 1MHz 옵셋에서 -116dBc/Hz였다. 전력소모는 15mW였으며, Kvco는 370MHz/V였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 A
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• pp.388-391
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• 1996

The conventional high frequency phase-shifted full bridge DC-DC converter has a disadavantage that a circulating current flows through transformer and switching devices during the freewheeling interval Due to this circulating current, RMS current stress, conduction losses of transformer and switching devices are increased. To alleviate this problem, this study provides a novel circulating current free type high frequency soft switching phase-shifted full bridge DC-DC converter which applies the energy recovery snubber(ERS) attached at the secondary side of transformer. The ERS adopted in this study is consisted of three fast recovery diode($Ds_1$, $Ds_2$, $Ds_3$), two resonant capacitor($Cs_1$, $Cs_2$) and a small resonant inductor [(Lr) : It can be ignored because the transformer leakage inductance(Ll) is able to use in stead of inserting the resonant inductor(Lr)]

• Journal of Power Electronics
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• 제11권2호
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• pp.173-178
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• 2011

In order to verify the performance of brushless DC (BLDC) motors, the simulation method has been widely used. The current of a BLDC motors flows on two phase windings to obtain a constant torque. However, the freewheeling current caused by the inductance component of a BLDC motor exists at the commutation point so that the current can flow on three phase windings at the same time. Due to the changes of the excited phases, the model equations are frequently changed during BLDC motor drive operation. The model equations can be also changed by the applied switching pattern since the current path in the inverter circuit changes according to switching pattern. A BLDC motor system can utilize various switching patterns for many different purposes. However, such changes of the model equations complicate the simulation procedure. In this paper, the technique to set up model equations is proposed to ease the simulation of a BLDC motor system through an inverter circuit analysis. The proposed technique will be verified using the C language. Although this method does not provide the level of detail obtainable from commercial simulation tools like PSIM or SIMULINK, it can provide an efficient way to quickly compare various conditions.

• Journal of Power Electronics
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• 제18권4호
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• pp.1178-1189
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• 2018

In grid-connected voltage-source inverters (VSIs), when compared with a simple inductive L filter, the LCL filter has a better performance in attenuating the high frequency harmonics caused by the pulse-width modulation of power switches. However, the resonance peaks generated by the filter inductors and capacitors can make a system unstable. In terms of simplicity and filter design cost, a passive damping method is generally preferred. However, its high power loss and degradation in high frequency harmonic attenuation are significant demerits. In this paper, a mathematical design solution for a passive LCL filter to derive filter parameters suppressing the high frequency current harmonics to 0.3% is proposed. The minimum filter inductance can be obtained to reduce the size of the filter. Furthermore, a minimum damping resistance design considering a current controller is analyzed for a stable closed-loop system. The proposed design method is verified by experimental results using a 5-kW three-phase prototype inverter.

• 조명전기설비학회논문지
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• 제27권10호
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• pp.59-68
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• 2013

This paper proposes the boost type bidirectional DC/DC converter with high efficiency for electric vehicle using an interleave method. This interleave method can reduce the system size because it reduces the ripple of output voltage and input current with no add to extra filter. Proposed system is consist of two converters and applies to interleaved method through phase shift to each converter. And it implements the high boost through voltage double and series construction of output port. Also, it reduces the price and increases the efficiency as operating the ZCS by leakage inductance of transformer and capacitor of voltage double with not add special reactor. Proposed DC/DC converter using interleave method is proved the validity through the result of PSIM simulation and experiment of 5kW DC/DC converter.

• 한국전기전자재료학회논문지
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• 제22권8호
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• pp.694-697
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• 2009

The separated three-phase flux-coupling type superconducting fault current limiter(SFCL) is composed of a series transformer and superconducting unit of the YBCO coated conductor. The primary and secondary coils in the transformer were wound in series each other through an iron core and the YBCO coated conductor was connected with secondary coil in parallel. In this paper, we investigated the current limiting characteristics through winding number of coil 2 and winding direction in the flux-coupling type SFCL. Through the analysis, it was shown that additive polarity condition and lower winding number of coil 2 have advantaged from the point of view of fault current limiting and burned of YBCO coated conductor.

• 제어로봇시스템학회논문지
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• 제16권10호
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• pp.975-981
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• 2010

Existing error compensation method of industrial electronic absolute displacement detector only depends on skilled engineers. This paper proposes a new table method in order to automatize error compensation. An waveform changes according to the parallel resistance for each pole were tabularized and four waveforms were superimposed to minimize total phase error. These process was verified using simulink. As a result of applying proposed method to the real sensor, peak to peak error was reduced from $3.428^{\circ}$ to $0.879^{\circ}$. In this case, compensation resistance is $4.7k\Omega$ in B pole and $20k\Omega$ in C pole. This compensation rate is comparable to skilled engineers, and it takes 0.8 second which is far shorter than 15 minutes when expert does.

• 한국초전도ㆍ저온공학회논문지
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• 제6권2호
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• pp.25-28
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• 2004

Three-phase inductive superconducting fault current limiter (SFCL) with DC reactor rated on 6.6 $KV_{rms}/200 A_{rms}$ has been developed in Korea. This system consists of one DC reactor, AC/DC power converter, and a three-phase transformer, which is called magnetic core reactor (MCR). This paper deals with the short-circuit analysis of the SFCL. The DC reactor was the HTS solenoid coil whose inductance was 84mH. The power converter was performed as the dual-mode operation for dividing voltage between the rectifying devices. The short-term normal operation (1 see) and short-circuit tests (2∼3 cycles) of this SFCL were performed successfully. In regular short-circuit test, the fault current was limited as 30% of rated short-circuit current at 2 cycles after the fault. The experimental results have a very similar tendency to the simulation results. Using the technique for the fault detection and SCR firing control, the fault current limiting rate of the SFCL was improved. From this research, the parameters for design and manufacture of large-scale SFCL were obtained.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.85-87
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• 2008

The demand of a three phase PWM inverter for the purpose of power control or grid-connecting is increasing. This inverter is connected to a grid through an L-filter or LCL-filter to reduce the harmonics caused by switching. An LCL-filter can reduce the harmonic of a low switching frequency and generate a satisfactory level of grid side current with a relatively low-inductance than an L-filter. But the additional poles caused by the LC part affects a stability problem due to induced resonance of the system. This paper presents a compensation method using a power theory to improve performance, the designed LCL-filter system and to reduce the stability problems caused by resonance. The effectiveness of the proposed algorithm is verified by simulations.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.83-87
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• 2004

Phase noise performance and current consumption of Radio Frequency (RF) Voltage-Controlled Oscillator (VCO) are largely dependent on the Quality (Q) factor of inductor-capacitor (LC) tank. Because the Q-factor of LC tank is determined by on-chip spiral inductor, we designed, analyzed, and modeled on-chip differential inductor to enhance differential Q-factor, reduce current consumption and save silicon area. The simulated inductance is 3.3 nH and Q-factor is 15 at 2 GHz. Self-resonance frequency is as high as 13 GHz. To verify its use to RF applications, we designed 2 GHz differential LC VCO. The measurement result of phase noise is -112 dBc/Hz at an offset frequency of 100 kHz from a 2GHz carrier frequency. Tuning range is about 500 MHz (25%), and current consumption varies from 5mA to 8.4 mA using bias control technique. Implemented in $0.35-{\mu}m$ SiGe BiCMOS technology, the VCO occupies $400\;um{\times}800\;um$ of silicon area.