• 전기전자학회논문지
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• 제17권4호
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• pp.544-549
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• 2013

본 논문은 CDR회로의 지터 감소를 위해 변형된 이진 위상검출기(뱅뱅위상 검출기- BBPD) 회로를 제안하였다. 제안된 PD는 하나의 에지를 사용함으로써 전압리플을 줄여, 제안한 PD를 적용하여 설계한 CDR회로는 감소된 지터 특성을 보였다. CMOS 0.13um 공정을 사용하여 설계하였고 제안한 위상검출기를 포함하는 클럭데이터 복원회로는 모의실험결과 16.9mW 전력소비에 peak-peak 지터는 10.96ps, rms 지터는 0.89ps을 보였다.

• 대한방사선기술학회지:방사선기술과학
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• 제35권4호
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• pp.315-319
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• 2012

본 연구는 위치 민감형 광 증폭 다이오드로부터 나오는 신호를 증폭 및 파형 변화 후 신호의 크기를 검출하여 일정시간 동안 유지시키는 뒷단 회로 개발에 관한 연구이다. 신호발생기에서 발생한 소신호를 증폭 소자를 통한 안정적인 증폭 후 미분회로를 통하여 신호 파형을 검출하기 수월한 형태로 변형 하고, peak/hold 회로에서 피크의 최대점을 일정시간 유지하여 신호의 수집을 원활하게 하였다. 본 회로에 대한 독립적인 성능 평가를 위하여 상용 장비로부터의 검사신호를 입력으로 사용하였다.

• Journal of Radiation Protection and Research
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• 제30권3호
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• pp.107-112
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• 2005

단일 핵종의 붕괴시 방출된 두 감마선이 함께 검출기에 흡수될 때 cascade summing이 일어난다. 이 효과는 일부 핵종에서 10% 이상의 계통적 오차를 야기한다. 이들 동시합성 효과를 추산하기 위해 검출기 주위에서 측정한 피크-토탈 비를 사용하여 그 효과를 직접 계산하였다. 검출기 주번에서 주어진 에너지에 대한 피크-토탈 비는 일정하지 않을 수 있으며, 따라서 측정된 값의 평균을 사용하여야 한다 산란 물체에 의한 피크-토달 비의 영향에 대한 결과도 함께 포함되어 있다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권1호
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• pp.22-28
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• 2009

This paper presents a fast received signal strength indicator (RSSI) circuit for wireless communication application. The proposed circuit is developed using power detectors and an analog-to-digital converter to achieve a fast settling time. The power detector is consisted of a novel logarithmic variable gain amplifier (VGA), a peak detector, and a comparator in a closed loop. The VGA achieved a wide logarithmic gain range in a closed loop form for stable operation. For the peak detector, a fast settling time and small ripple are obtained using the orthogonal characteristics of quadrature signals. In $0.18-{\mu}m$ CMOS process, the RSSI value settles down in $20{\mu}s$ with power consumption of 20 mW, and the maximum ripple of the RSSI is 30 mV. The proposed RSSI circuit is fabricated with a personal handy-phone system transceiver. The active area is $0.8{\times}0.2\;mm^2$.

• Nuclear Engineering and Technology
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• 제35권6호
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• pp.523-528
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• 2003

The efficiencies of single escape and double escape peaks were calculated by using Monte Carlo method and compared with measured efficiencies. The efficiency was obtained from the area ratio of escape peak to full energy absorption peak and the full energy absorption peak efficiency. For the escape peak interfered with other $\gamma-ray$ peaks, the net area was obtained by area correction. The GEANT code developed in CERN was used for the Monte Carlo calculation. The calculated efficiencies of the escape peaks agreed with the measurement within $12\%$.

• Nuclear Engineering and Technology
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• 제50권3호
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• pp.462-469
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• 2018

The background spectrum of a $3^{{\prime}{\prime}}{\times}3^{{\prime}{\prime}}$ NaI(Tl) well-type scintillation SILENA detector was measured without shielding, in 6 cm thick lead shielding, and with 2 mm thick electrolytic copper covering the detector inside the lead shielding. The relative remaining background of the lead shield lined with copper was found to be ideal for low-level environmental radioactive spectroscopy. The background total count rate in the (20-2160 KeV) was reduced 28.7 times by the lead and 29 times by the Cu + Pb shielding. The effective reduction of background (1.04) by the copper mainly appeared in the energy range from X-ray up to 500 KeV, while for the total energy range the ratio is 1.01 relative to the lead only. In addition, a strong relation between the full-energy peak absolute efficiency and the detector well height was found using gamma-ray isotropic radiation point sources placed inside the detector well. The full-energy peak efficiency at a midpoint of the well (at 2.5 cm) is three times greater than that on the detector surface. The energy calibrations and the resolution of any single energy line are independent of the locations of the gamma source inside or outside of the well.

• Journal of Radiation Protection and Research
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• 제43권4호
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• pp.154-159
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• 2018

Background: To prevent small leakage accidents, a real-time and direct detection system for small leaks with a detection limit below that of existing systems, e.g. $0.5gpm{\cdot}hr^{-1}$, is required. In this study, a small-size beta detector, which can be installed inside the reactor containment (CT) building and detect small leaks directly, was suggested and its feasibility was evaluated using MCNPX simulation. Materials and Methods: A target nuclide was selected through analysis of radiation from radionuclides in the reactor coolant system (RCS) and the spectrum was obtained via a silicon detector simulated in MCNPX. A window was designed to reduce the background signal caused by other nuclides. The sensitivity of the detector was also estimated, and its shielding designed for installation inside the reactor CT. Results and Discussion: The beta and gamma spectrum of the silicon detector showed a negligible gamma signal but it also contained an undesired peak at 0.22 MeV due to other nuclides, not the $^{16}N$ target nuclide. Window to remove the peak was derived as 0.4 mm for beryllium. The sensitivity of silicon beta detector with a beryllium window of 1.7 mm thickness was derived as $5.172{\times}10^{-6}{\mu}Ci{\cdot}cc^{-1}$. In addition, the specification of the shielding was evaluated through simulations, and the results showed that the integrity of the silicon detector can be maintained with lead shielding of 3 cm (<15 kg). This is a very small amount compared to the specifications of the lead shielding (600 kg) required for installation of $^{16}N$ gamma detector in inside reactor CT, it was determined that beta detector would have a distinct advantage in terms of miniaturization. Conclusion: The feasibility of the beta detector was evaluated for installation inside the reactor CT to detect small leaks below $0.5gpm{\cdot}hr^{-1}$. In future, the design will be optimized on specific data.

• Nuclear Engineering and Technology
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• 제41권5호
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• pp.723-728
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• 2009

The response property of the CZT detector ($5{\times}5{\times}5\;mm^3$), widely used in photon spectroscopy, was evaluated by considering the charge collection efficiency, which depends on the interaction position of incident radiation, A quantitative analysis of the energy spectra obtained from the CZT detector was also performed to investigate the tail effect at the low energy side of the full energy peak. The collection efficiency of electrons and holes to the two electrodes (i.e., cathode and anode) was calculated from the Hecht equation, and radiation transport analysis was performed by two Monte Carlo codes, Geant4 and MCNPX. The radiation source was assumed to be 59.5 keV gamma rays emitted from a $^{241}Am$ source into the cathode surface of this detector, and the detector was assumed to be biased to 500 V between the two electrodes. Through the comparison of the results between the Geant4 calculation considering the charge collection efficiency and the ideal case from MCNPX, an pronounced difference of 4 keV was found in the full energy peak position. The tail effect at the low energy side of the full energy peak was confirmed to be caused by the collection efficiency of electrons and holes. In more detail, it was shown that the tail height caused by the charge collection efficiency went up to 1000 times the pulse height in the same energy bin at the calculation without considering the charge collection efficiency. It is, therefore, apparent that research considering the charge collection efficiency is necessary in order to properly analyze the characteristics of CZT detectors.

• 대한인간공학회지
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• 제4권2호
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• pp.3-10
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• 1985

This article developes a cost-effective on-line measurement system of R - R intervals in ECG. The system is composed of a R peak detector, a timer and an Apple II computer (a 6502 microprocessor and memories). The system measures the R - R intervals in msec and stores them in a disk, for off-line analysis. A circuit diagram of the R peak detector and programs for controlling the microprocessor are presented.

• 전기전자학회논문지
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• 제24권4호
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• pp.975-981
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• 2020

위상 잡음을 개선하기 위한 출력 신호의 진폭을 제어하는 회로를 가진 10 GHz LC 전압 제어 발진기(VCO : voltage-controlled oscillator)가 제안된다. 제안된 LC VCO를 위한 진폭 제어 회로는 피크 검출 회로, 증폭기, 그리고 전류원 회로로 구성된다. 피크 검출 회로는 2 개의 diode-connected NMOSFET과 하나의 커패시터로 구성되어 출력 신호의 최젓값을 감지함으로 수행된다. 제안하는 진폭 제어 회로를 가진 LC VCO는 1.2 V 공급 전압을 사용하는 55 nm CMOS 공정에서 설계된다. 설계된 LC VCO의 면적은 0.0785 ㎟이다. 제안된 LC VCO에 사용된 진폭 제어 회로는 기존 LC VCO의 출력 신호에서 발생되는 242 mV의 진폭 변화를 47 mV로 줄인다. 또한, 출력 신호의 peak-to-peak 시간 지터를 8.71 ps에서 931 fs로 개선한다.