• 제목/요약/키워드: Pd/Ge

검색결과 39건 처리시간 0.023초

핫플래이트 소결에 의한 (n)GaAs에 Au-Pd-Ge계의 음성접촉 특성에 관한 연구 (A Study on the Ohmi Ccontact Characteristics of Au-Pd-Ge System to (n)GaAs by Hot Plate Sintering)

  • 박창엽;남춘우;소지영
    • E2M - 전기 전자와 첨단 소재
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    • 제1권3호
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    • pp.251-260
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    • 1988
  • n형 GaAs에 음성접촉을 형성함에 있어서 Au-Ge 공융합금을 용해시키는 alloying 보다는 sintering을 필요로 하는 Su-Pd-Ge계의 새로운 융성접촉을 도입하였다. Au-Pd-Ge계의 최적의 음성조건을 조사하기 위하여 Au/Pd/Ge, Au/Ge/Pd, Au/Pd/Ge/Pd 그리고 Au/Pd/Au/Ge 음성접촉을 제조하였다. 비접촉저항을 조사하는데 있어서 sintering 온도는 390-450.deg.C사이였고 시간은 30초에서 6분 사이였다. Au-Pd-Ge계의 비접촉저항은 alloying된 Au/Pd/Ge 접촉의 그것에 필적할 만큼 낮았으며 특히 Au/Ge/Pd 접촉은 430.deg.C, 3분의 sintering 조건에서 가장 낮은 1.2*$10^{-6}$.OMEGA..$cm^{2}$의 비접촉저항을 나타냈다. Au/Ge/Pd 접촉의 표면형상 및 접촉패턴 가장자리는 450.deg.C에서 2분 이상 sintering된 접촉을 제외하고는 sintering 후에 as-deposited 상태와 다를 바가 없었다. 430.deg.C, 3분 sintering에서 가장 낮은 비접촉저항을 나타낸 Au/Ge/Pd 접촉의 비접촉저항은 430.deg.C에서 Ge/Pd 두께 변화에 비교적 변화가 적었다.

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Bulk-Si와 PD-SOI에 형성된 SiGe p-MOSFET의 전기적 특성의 비교 (Comparison of Electrical Characteristics of SiGe pMOSFETs Formed on Bulk-Si and PD-SOI)

  • 최상식;최아람;김재연;양전욱;한태현;조덕호;황용우;심규환
    • 한국전기전자재료학회논문지
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    • 제20권6호
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    • pp.491-495
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    • 2007
  • This paper has demonstrated the electrical properties of SiGe pMOSFETs fabricated on both bulk-Si and PD SOI substrates. Two principal merits, the mobility increase in strained-SiGe channel and the parasitic capacitance reduction of SOI isolation, resulted in improvements in device performance. It was observed that the SiGe PD SOI could alleviate the floating body effect, and consequently DIBL was as low as 10 mV/V. The cut-off frequency of device fabricated on PD SOI substrate was roughly doubled in comparison with SiGe bulk: from 6.7 GHz to 11.3 GHz. These experimental result suggests that the SiGe PD SOI pMOSFET is a promising option to drive CMOS to enhance performance with its increased operation frequency for high speed and low noise applications.

소수운반자 전도 SiGe PD-SOI MOSFET의 전기적 특성에 대한 전산 모사 (Simulation on Electrical Properties of SiGe PD-SOI MOSFET for Improved Minority Carrier Conduction)

  • 양현덕;최상식;한태현;조덕호;김재연;심규환
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.21-22
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    • 2005
  • Partially-depleted Silicon on insulator metal-oxide-semiconductor field- effect transistors (PD-SOI MOSFETs) with Silicon-germanium (SiGe) layer is investigated. This structure uses SiGe layer to reduce the kink effect in the floating body region near the bottom channel/buried oxide interface. Among many design parameters influencing the performance of the device, Ge composition is presented most predominant effects, simulation results show that kink effect is reduced with increase the Ge composition. Because the bandgap of SiGe layer is reduced at higher Ge composition, the hole current between body and SiGe layer is enhanced.

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AlGaAs/GaAs HBT 에미터 전극용 Pd/Ge계 오믹 접촉 (Pd/Ge-based Emitter Ohmic Contacts for AlGaAs/GaAs HBTs)

  • 김일호
    • 한국재료학회지
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    • 제13권7호
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    • pp.465-472
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    • 2003
  • Pd/Ge/Ti/Pt and Pd/Ge/Pd/Ti/Au ohmic contacts to n-type InGaAs were investigated for applications to AlGaAs/GaAs HBT emitter ohmic contacts. In the Pd/Ge/Ti/Pt ohmic contact minimum specific contact resistivity of $3.7${\times}$10^{-6}$ $\Omega$$\textrm{cm}^2$ was achieved by rapid thermal annealing at $^400{\circ}C$/10 sec. In the Pd/Ge/Ti/Au ohmic contact, minimum specific contact resistivity of $1.1${\times}$10^{-6}$ $\Omega$$\textrm{cm}^2$ was achieved by annealing at 40$0^{\circ}C$/10 sec but the ohmic performance was degraded with increasing annealing temperature due to the reaction between the ohmic contact materials and the InGaAs substrate. However, non-spiking planar interface and relatively good ohmic contact (high-$10^{-6}$ /$\Omega$$\textrm{cm}^2$) were maintained after annealing at $450^{\circ}C$/10 sec. Therefore, these thermally stable ohmic contact systems are promising candidates for compound semiconductor devices. RF performance of the AlGaAs/GaAs HBT was also examined by employing the Pd/Ge/Ti/Pt and Pd/Ge/Pd/Ti/Au systems as emitter ohmic contacts. Cutoff frequencies were 63.5 ㎓ and 65.0 ㎓, respectively, and maximum oscillation frequencies were 50.5 ㎓ and 51.3 ㎓, respectively, indicating very successful high frequency operations.

이종접합 쌍극자 트랜지스터(HBT)의 에미터 접촉층으로 사용되는 InGaAs에 대한 Pd/Ge/Ti/Pt의 오믹 접촉 특성 (Pd/Ge/Ti/pt Ohmic contact to InGaAs for Heterojunction Bipolar Transistors(HBTs))

  • 김일호;장경욱;박성호(주)가인테크
    • 한국진공학회지
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    • 제10권2호
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    • pp.219-224
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    • 2001
  • N형 InGaAs에 대한 Pd/Ge/Ti/Pt 오믹 접촉 특성을 조사하였다. $450^{\circ}C$까지의 급속 열처리에 의해 우수한 오믹 특성을 나타내어 $400^{\circ}C$, 10초의 급속 열처리 조건에서 최저 $3.7\times10^{-6}\; \Omega\textrm{cm}^2$ 의 접촉 비저항을 나타내었다. 이는 열처리에 의해 생성된 Pd-Ge계 화합물의 형성 및 Ge의 InGaAs 표면으로의 확산과 관련이 있었다. 그러나 열처리 시간을 연장할 경우 접촉 비저항이 $low-10^5\; \Omega\textrm{cm}^2$로 약간 증가하였다. 고온 열처리 후에도 오믹 재료와 InGaAs의 평활한 계면을 유지하면서 우수한 오믹 특성을 나타내어, 화합물 반도체 소자의 오믹 접촉으로 충분히 응용 가능하다고 판단된다.

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N형 Ge-on-Si 기판에 형성된 Pd Germanide의 열안정성 및 Schottky 장벽 분석 (Analysis of Thermal Stability and Schottky Barrier Height of Pd Germanide on N-type Ge-on-Si Substrate)

  • 오세경;신홍식;강민호;복정득;정의정;권혁민;이가원;이희덕
    • 한국전기전자재료학회논문지
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    • 제24권4호
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    • pp.271-275
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    • 2011
  • In this paper, thermal stability of palladium germanide (Pd germanide) is analyzed for high performance Schottky barrier germanium metal oxide semiconductor field effect transistors (SB Ge-MOSFETs). Pd germanide Schottky barrier diodes were fabricated on n-type Ge-on-Si substrates and the formed Pd germanide shows thermal immunity up to $450^{\circ}C$. The barrier height of Pd germanide is also characterized using two methods. It is shown that Pd germanide contact has electron Schottky barrier height of 0.569~0.631 eV and work function of 4.699~4.761 eV, respectively. Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.

PD-SOI기판에 제작된 SiGe p-MOSFET의 신뢰성 분석 (Reliability Analysis of SiGe pMOSFETs Formed on PD-SOI)

  • 최상식;최아람;김재연;양전욱;한태현;조덕호;황용우;심규환
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.533-533
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    • 2007
  • The stress effect of SiGe p-type metal oxide semiconductors field effect transistors(MOSFETs) has been investigated to compare device properties using Si bulk and partially depleted silicon on insulator(PD SOI). The electrical properties in SiGe PD SOI presented enhancements in subthreshold slope and drain induced barrier lowering in comparison to SiGe bulk. The reliability of gate oxides on bulk Si and PD SOI has been evaluated using constant voltage stressing to investigate their breakdown (~ 8.5 V) characteristics. Gate leakage was monitored as a function of voltage stressing time to understand the breakdown phenomena for both structures. Stress induced leakage currents are obtained from I-V measurements at specified stress intervals. The 1/f noise was observed to follow the typical $1/f^{\gamma}$ (${\gamma}\;=\;1$) in SiGe bulk devices, but the abnormal behavior ${\gamma}\;=\;2$ in SiGe PD SOI. The difference of noise frequency exponent is mainly attributed to traps at silicon oxide interfaces. We will discuss stress induced instability in conjunction with the 1/f noise characteristics in detail.

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AIGaAs/GaAs HBT 응용을 위한 Pd/Ge/Pd/Ti/Au 오믹 접촉 (Pd/Ge/Pd/Ti/Au Ohmic Contact for Application to AlGaAs/GaAs HBT)

  • 김일호;박성호(주)가인테크
    • 한국진공학회지
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    • 제11권1호
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    • pp.43-49
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    • 2002
  • N형 InGaAs에 대한 Pd/Ge/Pd/Ti/Au 오믹 접촉의 급속 열처리 조건에 따른 오믹 특성을 조사하였다. $450^{\circ}C$까지의 열처리에 의해 우수한 오믹 특성을 나타내어 $400^{\circ}C$/10초의 급속 열처리 후에 최저 $1.1\times10^{-6}\Omega\textrm{cm}^2$의 접촉 비저항을 나타내었다. $425^{\circ}C$ 이상의 열처리 후에 접촉 비저항이 점점 증가하여 $450^{\circ}C$에서는 오믹 재료와 InGaAs의 반응에 의해 오믹 특성의 열화가 나타났다. 그러나 high-$10^{-6}\Omega\textrm{cm}^2$ 정도의 비교적 우수한 오믹 특성을 유지하였고, 양호한 표면 및 계면이 얻어져 화합물 반도체 소자에의 응용 가능성이 충분한 것으로 판단된다.

Pd/Ge/Pd/Ti/Au-InGaAs 오믹접촉의 급속 열처리 의존성 (RTA Dependence of Pd/Ge/Pd/Ti/Au-InGaAs Ohmic Contact)

  • 박성호;김좌연;김일호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 추계학술대회 논문집
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    • pp.151-154
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    • 1998
  • We have investigated a correlation of the electrical properties of the Pd/Ge/Pd/Ti/Au ohmic contact on n-InGaAs with its microstructures for the high temperature application of compound semiconductor devices. The samples were heat-treated by the rapid thermal annealing at various temperatures. In the contact system, moderately good specific contact resistance was obtained even before annealing because of the low metals-InGaAs barrier height, and better ohmic performances were observed by annealing up to 400˚C. But the ohmic performance was degraded after annealing at 450˚C due to the increment of Pd$_2$Ga$\sub$5/ phases.

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