• Proceedings of the KIPE Conference
• /
• 2002.07a
• /
• pp.343-346
• /
• 2002

In recent, complex SVPWM (Space Vector PWM) algorithm can be easily implemented by high performance microprocessor and DSP. Various SVPWM techniques are widely studied due to the advantages of low harmonic distortion and high use ratio of D.C. link voltage. Most of various studies for improving of VS-PWM inverter performance are concentrated about switching pattern and zero pulse pattern split algorithms. However, dc link voltage that is determined at rated load and speed conditions is not proper in the low speed and under rated load. In this paper, analysis of current ripple with digitally implemented SVPWM inverter is introduced according to link voltage. The optimal link voltage in the designed inverter system and load condition is provided in order to suppress output voltage error and current ripple. As remaining the effective voltage vector interval per sampling period sufficiently, additional voltage error and current ripple are suppressed. The proposed algorithm is verified through digital simulation and experimental results.

• Proceedings of the KIEE Conference
• /
• 1994.07a
• /
• pp.307-312
• /
• 1994

In this investigation the PFM(Pulse Frequency Modulation} will be used for optimizing PWM inverter pulse pattern. In traditional the pulse frequency of PWM is kept const. But modulated PWM's frequency in this study, the sinusoidal inverter's performance should be improved. The PWM pulsepatterns are definitely controlled so that the time-integral function of the voltage vectors in the space vector notation may show a circular locus. Further, performance index will be minimized because of minimizing distortion of output current. Finally, we will implement itusingsingle-chip microprocessor.

• Proceedings of the KIEE Conference
• /
• 2007.10a
• /
• pp.407-408
• /
• 2007

In this paper, we present a new method for classifying object using LVQ (Learning Vector Quantization) with flexible output layer. The proposed LVQ is a supervised learning method that dynamically generates output neurons and initializes automatically the weight vectors from training patterns. If the classes of the nearest output neuron is different from the class of the training pattern, a new output neuron is created and the given training pattern is used to initialize the weight vector of the created neuron. The proposed method is significantly different from the previous competitive learning algorithms in the point that the output neurons are dynamically generated during the learning process.

• Journal of KIISE:Computer Systems and Theory
• /
• v.30 no.5_6
• /
• pp.213-222
• /
• 2003

Most existing algorithms adopt the forward mapping method that is based on vector representation. Problem of existing algorithms Is the exponential increase of memory usage with number of layers. This degrades the accuracy of the boundary pattern representation. Our method uses bitmap representation and does not require any additional post-processing for conversion of vector-form results to bitmap-form. A new and efficient algorithm is presented in this paper for the generation of hyperbolic patterns by means of backward mapping methods.

• Journal of Korean Society of Transportation
• /
• v.26 no.3
• /
• pp.75-84
• /
• 2008

In 2002, the 5-day workweek policy was effective in Korea. As we have expected, the 5-day workweek policy has changed people's travel behavior during weekdays and weekends. Several studies have been done to understand these changes and impacts on transportation systems. However, these studies have only focused on travel pattern changes without considering spatial factors. Said in another way, although individual travel pattern changes are usually investigated, indices adopted cannot describe travel pattern changes in a proper way due to lack of the spatial distribution measure. This study aims to analyze travel change since the 5-day work week policy in effect using a new index (i.e. Travel Vector Index) developed in this study, which can explain travel pattern changes in terms of magnitude and spatial point of views. The new index uses a GIS technology and TCS (Toll Collection System) databases in Korea. The results in this study show that the index is very useful and reliable to measure the travel patterns changes. They are applied to TCS data set and the results show that the 5-day workweek policy significantly affects on travel behaviors.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.42 no.4 s.304
• /
• pp.119-126
• /
• 2005

We propose a new content-based image retrieval using a representative color histogram and directional pattern histogram that is adaptive to the classification characteristics of the image blocks. In the proposed method the color and pattern feature vectors are extracted according to the characteristics o: the block classification after dividing the image into blocks with a fixed size. First, the divided blocks are classified as either luminance or color blocks depending on the saturation of the block. Thereafter, the color feature vectors are extracted by calculating histograms of the block average luminance co-occurrence for the luminance block and the block average colors for the color blocks. In addition, block directional pattern feature vectors are extracted by calculating histograms after performing the directional gradient classification of the luminance. Experimental results show that the proposed method can outperform the conventional methods as regards the precision and the size of the feature vector dimension.

• Journal of Korea Multimedia Society
• /
• v.11 no.10
• /
• pp.1460-1470
• /
• 2008

As the performance of recent mobile systems increases, a vector graphic has been implemented to represent various types of dynamic menus, mails, and two-dimensional maps. This paper proposes a hardware accelerator for open vector graphics (OpenVG), which is widely used for two-dimensional vector graphics. We analyze the specifications of an OpenVG and divide the OpenVG into several functions suitable for hardware implementation. The proposed hardware accelerator is implemented on a field programmable gate array (FPGA) board using hardware description language (HDL) and is about four times faster than an Alex processor.

• Proceedings of the IEEK Conference
• /
• 1998.10a
• /
• pp.1005-1008
• /
• 1998

IC testing plays a very important role in IC manufacturing process. Modern complex ASIC chips making it difficult for gate level and RLT level test generation techniques to generate good test vector in resonable time. In this paper we proposed new test pattern generation method in VHDL description to detect manufacturing faults. This method based on software testing can easily generate test vector and independent to synthesis result.

• 제어로봇시스템학회:학술대회논문집
• /
• 2002.10a
• /
• pp.42.4-42
• /
• 2002

With the research of simplified neural networks, we propose an AND/OR neural network; a kind of brief, fast network Then, we present an OCR solution that equip the network in one-chip FPGA and design it by using HDL. We selected the representative hexadecimal character as the recognition feature class and used a Feature Vector Recognition Method in the statistic pattern recognition. The result feature vector was encoded into a 7 bit array and inputted into the AND/OR network to finish learning.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2007.06a
• /
• pp.309-310
• /
• 2007