• 전기화학회지
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• 제6권2호
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• pp.103-112
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• 2003

리튬이차전지 음극활물질로 사용되는 합성흑연입자에 여러종류금속을 코팅하여 그 전기화학적특성을 조사하였으며, 구체적인 코팅방법으로는 가스분산스프레이 코팅법을 적용하였다. 본 연구범위내에서 금속을 코팅한 입자로 제조된 전극은 충방전시 형성되는 계면저항을 감소시킴으로서 결과적으로 원시료에 비해서 높은 방전용량을 나타내었다. CV실험을 통해서 은과 주석은 리튬과의 합금반응을 확인할 수 있었으나, 2.5 중량$\%$ 이하의 낮은 코팅량을 고려했을 때, 높은 분산도를 지닌 금속 물질의 코팅을 통한 전극 활물질 표면의 균일한 전도도의 증가가 주요원인인 것으로 사료되었다. 단일계 금속으로 코팅하였을 경우 은코팅한 전극활물질이 가장 높은 방전용량과 사이클특성을 나타내었고, 은을 기본으로 하는 이성분계에서는 은-니켈전극이 가장 높은 고율특성을 나타내었다.

• Korean Chemical Engineering Research
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• 제56권3호
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• pp.303-308
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• 2018

본 연구에서는 리튬이차전지 음극활물질인 Silicon/Carbon (Si/C) 복합소재를 제조하여 바인더 및 첨가제가 전지성능에 미치는 영향을 조사하였다. Si/C 합성물은 마그네슘의 열 환원 반응을 통해 SBA-15 (Santa Barbara Amorphous material No. 15)를 제조한 후 페놀 수지의 탄화 과정을 통해 합성하였다. Si/C 음극소재는 충 방전, 순환전압전류, 임피던스 테스트를 통해 전기화학적 성능을 분석하였다. PAA 바인더를 이용한 Si/C 전지의 용량은 1,899 mAh/g으로 다른 바인더를 사용한 합성물보다 우수하였으며, 40 사이클 동안 92%에 달하는 높은 용량 보존율을 나타내었다. 또한, VC 첨가제를 사용한 전지의 경우 3,049 mAh/g의 높은 초기용량을 나타내며, 실리콘 표면에 보호막을 형성해 초기 비가역용량을 감소시켜줌을 알 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.280-284
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• 2004

Multicrystalline silicon wafers were textured in an alkaline bath, basically using sodium hydroxide and in acidic bath, using mainly hydrofluoric acid (HF), nitric acid $(HNO_3)$ and de-ionized water (DIW). Some wafers were also acid polished for the comparative study. Comparison of average reflectance of the samples treated with the new recipe of acidic solution showed average diffuse reflectance less than even 5 percent in the optimized condition. Solar cells were thus fabricated with the samples following the main steps such as phosphorus doping for emitter layer formation, silicon nitride deposition for anti-reflection coating by plasma enhanced chemical vapor deposition (PECVD) and front surface passivation, screen printing metallization, co-firing in rapid thermal processing (RTP) Furnace and laser edge isolation and confirmed >14 % conversion efficiency from the best textured samples. This isotropic texturing approach can be instrumental to achieve high efficiency in mass production using relatively low cost silicon wafers as starting material.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.46-49
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• 2003

Chemical mechanical polishing (CMP) is an essential dielectric planarization in multilayer microelectronic device fabrication. In the CMP process it is necessary to minimize the extent of surface defect formation while maintaining good planarity and optimal material removal rates. The polishing mechanism of W-CMP process has been reported as the repeated process of passive layer formation by oxidizer and abrasion action by slurry abrasives. Thus, it is important to understand the effect of oxidizer on W passivation layer, in order to obtain higher removal rate (RR) and very low non-uniformity (NU%) during W-CMP process. In this paper, we compared the effects of oxidizer or W-CMP process with three different kind of oxidizers with 5% hydrogen peroxide such as $Fe(NO_3)_3$, $H_2O_2$, and $KIO_3$. The difference in removal rate and roughness of W in stable and unstable slurries are believed to caused by modification in the mechanical behavior of $Al_3O_3$ particles in presence of surfactant stabilizing the slurry.

• 마이크로전자및패키징학회지
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• 제10권4호
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• pp.53-60
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• 2003

CCD(Charge-Coupled Device) wafer와 같이 표면이 polymer 성분의 micro lens로 구성되어있는 경우 passivation 막을 도포하지 않는 것이 보통인데, 이때 particle이 lens 표면에 쉽게 달라붙는 현상이 나타나게 된다. 특히 sawing 하면서 발생하는 particle은 치명적인 불량을 유발한다. 본 연구에서는 sawing에서 발생한 particle을 효과적으로 flushing하기위한 방안으로 측면노즐과 중심노즐의 분사위치, 분사각도, 퍼짐각도를 최적화 하고, 아울러 flushing 노즐을 추가한 새로운 형태의 wafer saw를 도입하였다. 개선된 saw를 적용하여 실험한 결과 particle로 인한 CCD chip의 불량률이 9.l%로부터 0.63%로 현격하게 개선되었음을 확인할 수 있었다.

• 센서학회지
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• 제11권5호
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• pp.294-300
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• 2002

In this study, we fabricated thermopile infrared sensor with floating membrane structure. Floating membrane was formed by SOI(Silicon On Insulator) structure. In SOI structure, silicon dioxide layer between top silicon layer and bottom silicon substrate was etched by HF solution, then membrane was floated over substrate. After membrane was floated, thermopile pattern was formed on membrane. By insertion of SOI technology, we could obtain thermal isolation structure easily and passivation process for sensor pattern protection was not required during fabrication process. Then, the amplifier circuit for thermopile sensor was fabricated by using $1.5{\mu}m$ CMOS process. The voltage gain of fabricated amplifier was about two hundred.

• Carbon letters
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• 제1권3_4호
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• pp.170-177
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• 2001

Lithium intercalated carbon (LIC) are basically employed as an anode for currently commercialized lithium secondary batteries. However, there are still strong interests in modifying carbon surface of active materials of the anode because the amount of irreversible capacity, charge-discharge capacity and high rate capability are largely determined by the surface conditions of the carbon. In this study, the carbonaceous materials were coated with tin oxide and copper by fluidized-bed chemical vapor deposition (CVD) method and their coating effects on electrochemical characteristics were investigated. The electrode which coated with tin oxides gave the higher capacity than that of raw material. Their capacity decreased with the progress of cycling possibly due to severe volume changes. However, the cyclability was improved by coating with copper on the surface of the tin oxides coated carbonaceous materials, which plays an important role as an inactive matrix buffering volume changes. An impedance on passivation film was decreased as tin oxides contents and it resulted in the higher capacity.

• Transactions on Electrical and Electronic Materials
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• 제2권2호
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• pp.26-31
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• 2001

This paper presents the electrochemical etch-stop characteristics of single-crystal Si(001) wafers in tetramethyl ammonium hydroxide(TMAH):isopropyl alcohol(IPA):pyrazine solutions. The addition of pyrazine to TMAH:IPA solutions increased the etch rate of (100) Si, thus the etching time required by the etch-stop process shortened. The current-voltage(I-V) characteristics of n- and p-type Si in TMAH:IPA:pyrazine solutions were obtained, respectively. Open circuit potential(OCP) and passivation potential(PP) of n- and p-type Si, respectively, were obtained and applied potential was selected between n- and p-type Si PPs. The electrochemical etch-stop method was used to fabricate 801 microdiaphragms of 20 ${\mu}{\textrm}{m}$ thickness on a 5-inch Si wafer. The average thickness of fabricated 801 microdiaphragms on one Si wafer was 20.03 ${\mu}{\textrm}{m}$ and the standard deviation was $\pm$0.26 ${\mu}{\textrm}{m}$. The Si surface of the etch-stopped microdiaphragm was extremely flat with no noticeable taper or nonuniformity.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.899-901
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• 2009

The magnesium fluoride ($MgF_2$) has very higher optical transmission than oxide or nitride material applied for gas barrier, so we manufactured Mg-Zn-F films with Mg-Zn-F target mixed in the various ratio of $MgF_2$ to Zn and characterized films' properties. Zn is used to increase packing density of barrier film. Thickness and optical transmission of Mg-Zn-F are 200 nm and over 90 %, respectively. The result of water vapor transmission rate at 38, RH 90 ~ 100% of the Mg-Zn-F film deposited with 4 : 6 ($MgF_2$ : Zn) ratio target reached below $1{\times}10^{-3}g$/($m^2{\cdot}day$), measuring limit of instrument.

• Transactions on Electrical and Electronic Materials
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• 제1권2호
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• pp.7-11
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• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.