• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.5
• /
• pp.31-40
• /
• 2010

This paper describes a LDPC decoder for IEEE 802.11n wireless LAN standard. The designed processor supports parity check matrix for block length of 1,944 and code rate of 1/2 in IEEE 802.11n standard. To reduce hardware complexity, the min-sum algorithm and layered decoding architecture are adopted. A novel memory reduction technique suitable for min-sum algorithm was devised, and our design reduces memory size to 25% of conventional method. The LDPC decoder processor synthesized with a $0.35-{\mu}m$ CMOS cell library has 200,400 gates and memory of 19,400 bits, and the estimated throughput is about 135 Mbps at 80 MHz@2.5v. The designed processor is verified by FPGA implementation and BER evaluation to validate the usefulness as a LDPC decoder.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.42 no.3
• /
• pp.51-56
• /
• 2005

To improve the BER of OFDM on a fading channel, a low-density parity check coded OFDM system is proposed in this paper. LDPC codes are decoded with Sum-Product or Belief Propagation Algorithm known by probability propagation algorithm. When LDPC codes are applied to OFDM system, the BER performance is dependant on the iteration number of decoding. To improve the spectral efficiency, multi-level modulations are used in mobile communication system. But, It is not clear how to decode LDPC code used in OFDM with multi-level modulations. In the paper, a decoding algorithm is described for LDPC coded OFDM with MPSK. When use the proposed decoding algorithm, we get the good BER for AWGN and a Fading Channel. Simulation results show that the proposed decoding algorithm is confirmed LDPC coded OFDM with MPSK.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.1
• /
• pp.76-84
• /
• 2007

The goal of this paper is to improve the watermarking performance using the following two methods; watermark estimation and low density parity check (LDPC) codes. For a blind watermark decoding, the power of a host image, which is hundreds times greater than the watermark power, is the main noise source. Therefore, a technique that can reduce the effect of the power of the host image to the detector is required. To this end, we need to estimate watermark from the watermarked image. In this paper, the watermark estimation is done by an adaptive estimation method with the generalized Gaussian distribution modeling of sub-band coefficients in the wavelet domain. Since the watermark capacity as well as the error rate can be improved by adopting optimum decoding principles and error correcting codes (ECC), we employ the LDPC codes for the decoding of the estimated watermark. Also, in LDPC codes, the knowledge about the noise power can improve the error correction capability. Simulation results demonstrate the superior performance of the proposed algorithm comparing to LDPC decoding with other estimation-based watermarking algorithms.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.10
• /
• pp.2367-2372
• /
• 2015

One of various low-density parity-check(LDPC) codes that has been adopted in many communication standards due to its error correction ability is a quasi-cyclic LDPC(QC-LDPC) code, which leads to comparable decoder complexity. One of the main blocks in the QC-LCDC code decoder is a multi-size circular shifter(MSCS) that can perform various size rotation. The MSCS can be implemented with many structures, one of which is based on Banes network. The Benes network structure can perform the normal MSCS operation efficiently, but it cannot use the properties coming from specifications like rotation sizes. This paper proposesd a scheme where the Benes network structure can use the rotation size property with the modification of the control signal generation. The proposed scheme is applied to the MSCS of IEEE 802.16e WiMAX QC-LDPC decoder to reduce the number of MUXes and the critical path delay.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.7C
• /
• pp.611-617
• /
• 2010

In this paper, we investigate the performances of the serial concatenated convolutional codes (SCCC) and low-density parity-check (LDPC) codes on perpendicular magnetic recording (PMR) channels. We discuss the performance of two systems when user bit-densities are 1.7, 2.0, 2.4 and 2.8, respectively. The SCCC system is less complex than LDPC system. The SCCC system consists of recursive systematic convolutional (RSC) codes encoder/decoder, precoder and random interleaver. The decoding algorithm of the SCCC system is the soft message-passing algorithm and the decoding algorithm of the LDPC system is the log domain sum-product algorithm (SPA). When we apply the iterative decoding between channel detector and the error control codes (ECC) decoder, the SCCC system is compatible with the LDPC system even at the high user bit density.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.43 no.5 s.311
• /
• pp.68-75
• /
• 2006

Multimedia fingerprinting protects multimedia content from illegal redistribution by uniquely marking every copy of the content distributed to each user. Differ from a symmetric/asymmetric scheme, fingerprinting schemes, only regular user can know the inserted fingerprint data and the scheme guarantee an anonymous before recontributed data. In this paper, we present a scheme which is the algorithm using LDPC(Low Density Parity Check) for detection of colluded multimedia fingerprint and correcting errors. This proposed scheme is consists of the LDPC block, Hopfield Network and the algorithm of anti-collusion code generation. Anti-collusion code based on BIBD(Balanced Incomplete Block Design) was made 100% collusion code detection rate about the linear collusion attack(average, AND and OR) and LD% block for the error bits correction confirmed that can correct error until AWGN 0dB.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.44 no.4 s.316
• /
• pp.36-44
• /
• 2007

In this paper, we implement the speech & face recognition system to support various ubiquitous sensor network application services such as switch control, authentication, etc. using wireless audio and image interface. The proposed system is consist of the H/W with audio and image sensor and S/W such as speech recognition algorithm using psychoacoustic model, face recognition algorithm using PCA (Principal Components Analysis) and LDPC (Low Density Parity Check). The proposed speech and face recognition systems are inserted in a HOST PC to use the sensor energy effectively. And improve the accuracy of speech and face recognition, we implement a FEC (Forward Error Correction) system Also, we optimized the simulation coefficient and test environment to effectively remove the wireless channel noises and correcting wireless channel errors. As a result, when the distance that between audio sensor and the source of voice is less then 1.5m FAR and FRR are 0.126% and 7.5% respectively. The face recognition algorithm step is limited 2 times, GAR and FAR are 98.5% and 0.036%.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.38A no.9
• /
• pp.750-758
• /
• 2013

In this paper, we introduce the low-density parity-check (LDPC) coded orthogonal frequency division multiplexing (OFDM) subframe reordering scheme for achieving equal combined power allocation in type I hybrid automatic repeat request (H-ARQ) systems and analyze the performance improvement by using the channel capacity. Also, it is confirmed that the layered decoding for subframe reordering scheme in H-ARQ systems gives faster convergence speed. It is verified from numerical analysis that a subframe reordering pattern having larger channel capacity shows better bit error rate (BER) performance. Therefore the subframe reordering pattern achieving equal combined power allocation for each subframe maximizes the channel capacity and outperforms other subframe reordering patterns. Also, it is shown that the subframe reordering scheme for achieving equal combined power allocation gives better performance than the conventional Chase combining scheme without increasing the decoding complexity.

• Journal of Broadcast Engineering
• /
• v.8 no.4
• /
• pp.437-451
• /
• 2003

With the rapid growth of internet technologies and wide availability of multimedia computing facilities, the enforcement of multimedia copyright protection becomes an important issue. Digital watermarking is viewed as an effective way to deter content users from illegal distributions. In recent years, digital watermarking has been intensively studied to achieve this goal. However, when the watermarked media is transmitted over the channels modeled as the additive white Gaussian noise (AWGN) channel, the watermark information is often interfered by the channel noise and produces a large number of errors. So many error-correcting codes have been applied in the digital watermarking system to protect the embedded message from the disturbance of the noise, such as BCH codes, Reef-Solomon (RS) codes and Turbo codes. Recently, low-density parity-check (LDPC) codes were demonstrated as good error correcting codes achieving near Shannon limit performance and outperforming turbo codes nth low decoding complexity. In this paper, in order to mitigate the channel conditions and improve the quality of watermark, we proposed the application of LDPC codes on implementing a fairly robust digital image watermarking system. The implemented watermarking system operates in the spectrum domain where a subset of the discrete wavelet transform (DWT) coefficients is modified by the watermark without using original image during watermark extraction. The quality of watermark is evaluated by taking Into account the trade-off between the chip-rate and the rate of LDPC codes. Many simulation results are presented in this paper, these results indicate that the quality of the watermark is improved greatly and the proposed system based on LDPC codes is very robust to attacks.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.11
• /
• pp.2637-2642
• /
• 2015

The low-density parity check(LDPC) code is being widely used due to its outperformed error-correction ability. The decoder of the quasi-cyclic LDPC(QC-LDPC) codes, a kind of LDPC codes, requires a multi-size cyclic shifter(MSCS) performing rotation of various sizes. The MSCS can be implemented with a Benes network, which requires a $3{\times}3$ switch if the number of data to be rotated is a multiple of 3. This paper proposes a control signal generation with lower complexity and a faster $3{\times}3$ switch. For the experiment, the proposed schemes are applied to the MSCS of an IEEE 802.16e WiMAX QC-LDPC code decoder. The result shows that the delay is reduced by about 8.7%.