• KEPCO Journal on Electric Power and Energy
• /
• v.6 no.4
• /
• pp.473-480
• /
• 2020

In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.

• 제어로봇시스템학회:학술대회논문집
• /
• 2004.08a
• /
• pp.466-469
• /
• 2004

In this paper, we improve the matching impedance of antennas by inserting parasitic slots on the ground plane of right-angle triangular slot antennas. The designed antennas characteristics are analyzed by using Finite Different Time Domain (FDTD) method, the specific design frequency is 10 GHz and match impedance is 50 ohms. Simulation results show that the efficient of return loss and radiation patterns are improved and enhance. In this case, the right-angle triangular slot antennas with parasitic slots have matching impedance better than antennas without parasitic slots.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2003.11a
• /
• pp.511-514
• /
• 2003

In this paper, describes the design of PIFA for PDA which has parasitic patch to expand the impedance bandwidth and miniaturization technique to consider the radiation pattern. To expand the impedance bandwidth, generated resonant frequency of parasitic patch is different from that of main patch. To miniaturize the physical dimension, using the folded edge and rectangular slot. The obtained impedance bandwidth is 9.4% ($2.29GHz{\sim}2.515GHz$) at VSWR${\leqq}$2 and antenna gain is 2dBi within the operating frequency.

• Journal of electromagnetic engineering and science
• /
• v.7 no.3
• /
• pp.116-121
• /
• 2007

Novel design of a wideband monopole antenna for DVB-H service is presented. The proposed antenna is designed based on a monopole antenna. It consists of folded monopole and parallel parasitic element. The folded segment of the folded monopole makes the antenna shorter. The length of the parasitic element obtains additional resonance frequencies. The gap distance between the folded monopole and the parasitic element is a key parameter to control impedance matching for wideband operation. The antenna has wide band performance, good impedance and radiation characteristics from 470 MHz to 870 MHz. The measured return loss for operating frequencies over DVB-H band is better than 10 dB. Good radiation patterns are also obtained. The measured results are compared with calculated results using Ansoft HFSS(High Frequency Structure Simulator).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2016.05a
• /
• pp.83-84
• /
• 2016

A wideband stacked patch antenna with parasitic elements, rectangular and triangle shaped patches, is proposed. Two different shaped parasitic elements are placed in the above of main rectangular microstrip patch antenna in order to achieve wide bandwidth for 860 MHz band. Coupling between the main patch and parasitic patches is realized by thick air gap. The gap and locations of parasitic patches are found to be the main factor of the wideband impedance matching. The proposed antenna is designed on a ground plane with small size of $119mm{\times}109mm$ for application of compact transceivers. And the impedance bandwidth of the antenna should satisfied CDMA band to the 780MHz~890MHz.

• Journal of international Conference on Electrical Machines and Systems
• /
• v.3 no.3
• /
• pp.339-353
• /
• 2014

A straightforward method for optimal determining of a high frequency inductor's parasitic capacitance is presented. The proposed estimation method is based on measuring the inductor's impedance samples over a limited frequency range bordering on the resonance point considering k-dB deviation from the maximum impedance. An optimized solution to k could be obtained by minimizing the root mean squared error between the measured and the estimated impedance values. The model used to provide the estimations is a parallel RLC circuit valid at resonance frequency which will be transferred to the real model considering the mentioned interval of frequencies. A straightforward algorithm is suggested and programmed using MATLAB which does not require a wide knowledge of design parameters and could be implemented using a spectrum analyzer. The inputs are the measured impedance samples as a function of frequency along with the diameter of the conductors. The suggested algorithm practically provides the estimated parameters of a real inductance model at different frequencies, with or without design information. The suggested work is different from designing a high frequency inductor; it is rather concentration of determining the parameters of an available real inductor that could be easily done by a recipe provided to a technician.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.12 no.7
• /
• pp.1076-1085
• /
• 2001

In this paper, the FMM(Fast Multipole Method) combined with GMRES(Generalized Minimal RESidual Method) matrix solver is used to extract the parasitic impedance for complicated 3-D structures in uniform dielectric materials which limit the use of MoM(Method of Moment) due to its large computation time and memory requirement. This algorithm is a fast multipole-accelerated method based on quasistatic analysis and is very efficient for computing impedance between conductors. This paper proved the accuracy and efficiency of the FMM by comparing with MoM in simple examples. Finally the parasitic impedance of FC-PGA(Flip Chip Pin Grid Array) Package pins has been extracted by this algorithm and we have considered the possibility of the EMI/EMC problem caused by the signal interference.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.20 no.2
• /
• pp.137-143
• /
• 2015

This paper presents the intra capacitance modeling based on the winding method and section bobbin for CM choke capable of EMI attenuation of broad bands from lower to higher frequency bands and high frequency type common-mode choke capable of EMI attenuation of high frequency band used in the EMI Block of LED-TV SMPS. The case of high frequency type CM choke can be explained by the parasitic capacitance of three types of CM choke. The winding method of section bobbin type is smaller than the others. The first resonant frequency of the proposed CM choke tends to increase as the parasitic capacitance becomes small and its impedance characteristics improved performance as the first resonant frequency increases. The CM chokes of the proposed section bobbin type shows that in the future, the method may have practical use in LED/LCD-TV SMPS and in several applications, such as LED lighting, adapters, and so on.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.20 no.5
• /
• pp.874-879
• /
• 2016

A wideband stacked patch antenna with parasitic elements, rectangular and triangle shaped patches, is proposed. Two different shaped parasitic elements are placed in the above of main rectangular microstrip patch antenna in order to achieve wide bandwidth for 860 MHz band. Coupling between the main patch and parasitic patches is realized by thick air gap. The gap and locations of parasitic patches are found to be the main factor of the wideband impedance matching. The proposed antenna is designed and fabricated on a ground plane with small size of $119mm{\times}109mm$ for application of compact transceivers. The fabricated antenna on an FR4 substrate shows that the minimum measured return loss is below -11.68dB at 824 MHz and an impedance band of 818~919 MHz(11.7%) at 10dB return loss level. The measured radiation patterns are similar to those of a conventional patch antenna with maximum gain of 2.11 dBi at 824 MHz.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.19 no.1
• /
• pp.8-14
• /
• 2014

This paper presents the intra capacitance modeling according to the winding method and section bobbin for CM choke capable of the EMI attenuation of broad bands from lower frequency bands to higher frequency bands and high frequency type common-mode choke capable of the EMI attenuation of high frequency band used in the EMI Block of LED-TV SMPS. In case of high frequency type CM choke, it can be explained the parasitic capacitance of A type and section bobbin type winding methods among them is much smaller than the other. The first resonant frequency of the proposed CM choke tends to increase as the parasitic capacitance becomes small and its impedance characteristics also show improved performance as the first resonant frequency increases. In the future, the CM chokes of high frequency type show it can be practically used in not only LED/LCD-TV SMPS but also several applications such as LED Lighting, Adapter and so on.